Annotation of sys/arch/arm/arm/irq_dispatch.S, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: irq_dispatch.S,v 1.6 2005/12/27 20:05:34 drahn Exp $ */
2: /* $NetBSD: irq_dispatch.S,v 1.5 2003/10/30 08:57:24 scw Exp $ */
3:
4: /*
5: * Copyright (c) 2002 Fujitsu Component Limited
6: * Copyright (c) 2002 Genetec Corporation
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice, this list of conditions and the following disclaimer.
14: * 2. Redistributions in binary form must reproduce the above copyright
15: * notice, this list of conditions and the following disclaimer in the
16: * documentation and/or other materials provided with the distribution.
17: * 3. Neither the name of The Fujitsu Component Limited nor the name of
18: * Genetec corporation may not be used to endorse or promote products
19: * derived from this software without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
22: * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
23: * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24: * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25: * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
26: * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27: * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28: * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
29: * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30: * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
31: * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
32: * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33: * SUCH DAMAGE.
34: */
35:
36: /*
37: * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
38: * All rights reserved.
39: *
40: * Written by Jason R. Thorpe for Wasabi Systems, Inc.
41: *
42: * Redistribution and use in source and binary forms, with or without
43: * modification, are permitted provided that the following conditions
44: * are met:
45: * 1. Redistributions of source code must retain the above copyright
46: * notice, this list of conditions and the following disclaimer.
47: * 2. Redistributions in binary form must reproduce the above copyright
48: * notice, this list of conditions and the following disclaimer in the
49: * documentation and/or other materials provided with the distribution.
50: * 3. All advertising materials mentioning features or use of this software
51: * must display the following acknowledgement:
52: * This product includes software developed for the NetBSD Project by
53: * Wasabi Systems, Inc.
54: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
55: * or promote products derived from this software without specific prior
56: * written permission.
57: *
58: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
59: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
60: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
61: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
62: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
63: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
64: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
65: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
66: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
67: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
68: * POSSIBILITY OF SUCH DAMAGE.
69: */
70:
71: #include "assym.h"
72:
73: #include <machine/asm.h>
74: #include <machine/cpu.h>
75: #include <machine/frame.h>
76: #include <machine/intr.h>
77:
78: #ifndef ARM_IRQ_HANDLER
79: #error ARM_IRQ_HANDLER not defined
80: #endif
81:
82: /*
83: * irq_entry:
84: * Main entry point for the IRQ vector. This is a generic version
85: * which can be used by different platforms.
86: */
87: .text
88: .align 0
89: .Lcurrent_intr_depth:
90: .word _C_LABEL(current_intr_depth)
91:
92: AST_ALIGNMENT_FAULT_LOCALS
93:
94: ASENTRY_NP(irq_entry)
95: sub lr, lr, #0x00000004 /* Adjust the lr */
96:
97: PUSHFRAMEINSVC /* Push an interrupt frame */
98: ENABLE_ALIGNMENT_FAULTS
99:
100: /*
101: * Increment the interrupt nesting depth and call the interrupt
102: * dispatch routine. We've pushed a frame, so we can safely use
103: * callee-saved regs here. We use the following registers, which
104: * we expect to persist:
105: *
106: * r5 address of `current_intr_depth' variable
107: * r6 old value of `current_intr_depth'
108: */
109: ldr r5, .Lcurrent_intr_depth
110: mov r0, sp /* arg for dispatcher */
111: ldr r6, [r5]
112: add r1, r6, #1
113: str r1, [r5]
114:
115: bl ARM_IRQ_HANDLER
116:
117: /*
118: * Restore the old interrupt depth value (which should be the
119: * same as decrementing it at this point).
120: */
121: str r6, [r5]
122:
123: DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
124: PULLFRAMEFROMSVCANDEXIT
125: movs pc, lr /* Exit */
126:
127: .bss
128: .align 0
129:
130: .global _C_LABEL(astpending)
131: _C_LABEL(astpending):
132: .word 0
133:
134: .global _C_LABEL(current_intr_depth)
135: _C_LABEL(current_intr_depth):
136: .word 0
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