File: [local] / sys / arch / arm / arm / fiq_subr.S (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:05:09 2008 UTC (16 years, 3 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
|
/* $OpenBSD: fiq_subr.S,v 1.1 2004/02/01 05:09:48 drahn Exp $ */
/* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include "assym.h"
#include <arm/armreg.h>
#include <arm/asm.h>
#include <arm/cpuconf.h>
/*
* MODE_CHANGE_NOP should be inserted between a mode change and a
* banked register (R8--R15) access.
*/
#if defined(CPU_ARM2) || defined(CPU_ARM250)
#define MODE_CHANGE_NOP mov r0, r0
#else
#define MODE_CHANGE_NOP /* Data sheet says ARM3 doesn't need it */
#endif
#ifdef __PROG32
#define SWITCH_TO_FIQ_MODE \
mrs r2, cpsr_all ; \
mov r3, r2 ; \
bic r2, r2, #(PSR_MODE) ; \
orr r2, r2, #(PSR_FIQ32_MODE) ; \
msr cpsr_all, r2
#else
#define SWITCH_TO_FIQ_MODE ; \
mov r1, r15 ; \
bic r2, r1, #(R15_MODE) ; \
teqp r2, #(R15_MODE_FIQ) ; \
MODE_CHANGE_NOP
#endif /* __PROG32 */
#ifdef __PROG32
#define BACK_TO_SVC_MODE \
msr cpsr_all, r3
#else
#define BACK_TO_SVC_MODE ; \
teqp r1, #0 ; \
MODE_CHANGE_NOP
#endif /* __PROG32 */
/*
* fiq_getregs:
*
* Fetch the FIQ mode banked registers into the fiqhandler
* structure.
*/
ENTRY(fiq_getregs)
SWITCH_TO_FIQ_MODE
stmia r0, {r8-r13}
BACK_TO_SVC_MODE
mov pc, lr
/*
* fiq_setregs:
*
* Load the FIQ mode banked registers from the fiqhandler
* structure.
*/
ENTRY(fiq_setregs)
SWITCH_TO_FIQ_MODE
ldmia r0, {r8-r13}
BACK_TO_SVC_MODE
mov pc, lr
/*
* fiq_nullhandler:
*
* Null handler copied down to the FIQ vector when the last
* FIQ handler is removed.
*/
.global _C_LABEL(fiq_nullhandler), _C_LABEL(fiq_nullhandler_end)
_C_LABEL(fiq_nullhandler):
subs pc, lr, #4
_C_LABEL(fiq_nullhandler_end):