Annotation of sys/arch/arm/arm/arm_machdep.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: arm_machdep.c,v 1.1 2004/02/01 05:09:48 drahn Exp $ */
2: /* $NetBSD: arm_machdep.c,v 1.7 2003/10/25 19:44:42 scw Exp $ */
3:
4: /*
5: * Copyright (c) 2001 Wasabi Systems, Inc.
6: * All rights reserved.
7: *
8: * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed for the NetBSD Project by
21: * Wasabi Systems, Inc.
22: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23: * or promote products derived from this software without specific prior
24: * written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38:
39: /*
40: * Copyright (c) 1994-1998 Mark Brinicombe.
41: * Copyright (c) 1994 Brini.
42: * All rights reserved.
43: *
44: * This code is derived from software written for Brini by Mark Brinicombe
45: *
46: * Redistribution and use in source and binary forms, with or without
47: * modification, are permitted provided that the following conditions
48: * are met:
49: * 1. Redistributions of source code must retain the above copyright
50: * notice, this list of conditions and the following disclaimer.
51: * 2. Redistributions in binary form must reproduce the above copyright
52: * notice, this list of conditions and the following disclaimer in the
53: * documentation and/or other materials provided with the distribution.
54: * 3. All advertising materials mentioning features or use of this software
55: * must display the following acknowledgement:
56: * This product includes software developed by Mark Brinicombe
57: * for the NetBSD Project.
58: * 4. The name of the company nor the name of the author may be used to
59: * endorse or promote products derived from this software without specific
60: * prior written permission.
61: *
62: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
63: * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
64: * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
65: * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
66: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
67: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
68: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72: * SUCH DAMAGE.
73: */
74:
75: #include <sys/param.h>
76:
77: #include <sys/exec.h>
78: #include <sys/proc.h>
79: #include <sys/systm.h>
80: #include <sys/user.h>
81: #include <sys/pool.h>
82:
83: #include <arm/cpufunc.h>
84:
85: #include <machine/pcb.h>
86: #include <machine/vmparam.h>
87: #include <machine/bus.h>
88:
89: static __inline struct trapframe *
90: process_frame(struct proc *p)
91: {
92:
93: return (p->p_addr->u_pcb.pcb_tf);
94: }
95:
96: /*
97: * The ARM architecture places the vector page at address 0.
98: * Later ARM architecture versions, however, allow it to be
99: * relocated to a high address (0xffff0000). This is primarily
100: * to support the Fast Context Switch Extension.
101: *
102: * This variable contains the address of the vector page. It
103: * defaults to 0; it only needs to be initialized if we enable
104: * relocated vectors.
105: */
106: vaddr_t vector_page;
107:
108: /*
109: * Clear registers on exec
110: */
111:
112: void
113: setregs(struct proc *p, struct exec_package *pack, u_long stack,
114: register_t *retval)
115: {
116: struct trapframe *tf;
117:
118: tf = p->p_addr->u_pcb.pcb_tf;
119:
120: memset(tf, 0, sizeof(*tf));
121: /* tf->tf_r0 = (u_int)p->p_proc->p_psstr; */
122: tf->tf_usr_sp = stack;
123: tf->tf_usr_lr = pack->ep_entry;
124: tf->tf_svc_lr = 0x77777777; /* Something we can see */
125: tf->tf_pc = pack->ep_entry;
126: #ifdef __PROG32
127: tf->tf_spsr = PSR_USR32_MODE;
128: #endif
129:
130: p->p_addr->u_pcb.pcb_flags = 0;
131: retval[1] = 0;
132: }
133:
134: #if 0
135: /*
136: * startlwp:
137: *
138: * Start a new LWP.
139: */
140: void
141: startlwp(void *arg)
142: {
143: int err;
144: ucontext_t *uc = arg;
145: struct lwp *l = curlwp;
146:
147: err = cpu_setmcontext(l, &uc->uc_mcontext, uc->uc_flags);
148: #ifdef DIAGNOSTIC
149: if (err)
150: printf("Error %d from cpu_setmcontext.", err);
151: #endif
152: pool_put(&lwp_uc_pool, uc);
153:
154: userret(l);
155: }
156:
157: /*
158: * XXX This is a terrible name.
159: */
160: void
161: upcallret(struct lwp *l)
162: {
163:
164: userret(l);
165: }
166:
167: /*
168: * cpu_upcall:
169: *
170: * Send an an upcall to userland.
171: */
172: void
173: cpu_upcall(struct lwp *l, int type, int nevents, int ninterrupted, void *sas,
174: void *ap, void *sp, sa_upcall_t upcall)
175: {
176: struct trapframe *tf;
177: struct saframe *sf, frame;
178:
179: tf = process_frame(l);
180:
181: /* Finally, copy out the rest of the frame. */
182: #if 0 /* First 4 args in regs (see below). */
183: frame.sa_type = type;
184: frame.sa_sas = sas;
185: frame.sa_events = nevents;
186: frame.sa_interrupted = ninterrupted;
187: #endif
188: frame.sa_arg = ap;
189:
190: sf = (struct saframe *)sp - 1;
191: if (copyout(&frame, sf, sizeof(frame)) != 0) {
192: /* Copying onto the stack didn't work. Die. */
193: sigexit(l, SIGILL);
194: /* NOTREACHED */
195: }
196:
197: tf->tf_r0 = type;
198: tf->tf_r1 = (int) sas;
199: tf->tf_r2 = nevents;
200: tf->tf_r3 = ninterrupted;
201: tf->tf_pc = (int) upcall;
202: tf->tf_usr_sp = (int) sf;
203: tf->tf_usr_lr = 0; /* no return */
204: }
205: #endif
206:
207:
208: #define _CONCAT(A,B) A ## B
209: #define __C(A,B) _CONCAT(A,B)
210:
211: #define BUS_SPACE_COPY_N(BYTES,TYPE) \
212: void \
213: __C(bus_space_copy_,BYTES)(bus_space_tag_t bst, bus_space_handle_t h1, \
214: bus_size_t o1, bus_space_handle_t h2, bus_size_t o2, \
215: bus_size_t c) \
216: { \
217: int i; \
218: \
219: if (h1 == h2 && o2 > o1) \
220: for (i = c-1; i >= 0; i--) \
221: __C(bus_space_write_,BYTES)(bst, h2, o2+(BYTES*i), \
222: __C(bus_space_read_,BYTES)(bst, h1, o1+(BYTES*i))); \
223: else \
224: for (i = 0; i < c; i++) \
225: __C(bus_space_write_,BYTES)(bst, h2, o2+(BYTES*i), \
226: __C(bus_space_read_,BYTES)(bst, h1, o1+(BYTES*i))); \
227: }
228: BUS_SPACE_COPY_N(1,u_int8_t)
229: BUS_SPACE_COPY_N(2,u_int16_t)
230: BUS_SPACE_COPY_N(4,u_int32_t)
231:
232:
233:
234: #if 0
235: #define BUS_SPACE_READ_RAW_MULTI_N(BYTES,SHIFT,TYPE) \
236: void \
237: __C(bus_space_read_raw_multi_,BYTES)(bus_space_tag_t bst, \
238: bus_space_handle_t h, bus_addr_t o, u_int8_t *dst, bus_size_t size) \
239: { \
240: TYPE *src; \
241: TYPE *rdst = (TYPE *)dst; \
242: int i; \
243: int count = size >> SHIFT; \
244: \
245: src = (TYPE *)(h+o); \
246: for (i = 0; i < count; i++) { \
247: rdst[i] = *src; \
248: } \
249: }
250: BUS_SPACE_READ_RAW_MULTI_N(2,1,u_int16_t)
251: BUS_SPACE_READ_RAW_MULTI_N(4,2,u_int32_t)
252:
253: #define BUS_SPACE_WRITE_RAW_MULTI_N(BYTES,SHIFT,TYPE) \
254: void \
255: __C(bus_space_write_raw_multi_,BYTES)( bus_space_tag_t bst, \
256: bus_space_handle_t h, bus_addr_t o, const u_int8_t *src, \
257: bus_size_t size) \
258: { \
259: int i; \
260: TYPE *dst; \
261: TYPE *rsrc = (TYPE *)src; \
262: int count = size >> SHIFT; \
263: \
264: dst = (TYPE *)(h+o); \
265: for (i = 0; i < count; i++) { \
266: *dst = rsrc[i]; \
267: } \
268: }
269:
270: BUS_SPACE_WRITE_RAW_MULTI_N(2,1,u_int16_t)
271: BUS_SPACE_WRITE_RAW_MULTI_N(4,2,u_int32_t)
272: #endif
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to arm_machdep.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / arm / arm