File: [local] / sys / arch / amd64 / include / reg.h (download)
Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:05:06 2008 UTC (16 years, 4 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD Changes since 1.1: +0 -0 lines
Import of OpenBSD 4.2 release kernel tree with initial code to support
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO
Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)
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/* $OpenBSD: reg.h,v 1.4 2005/12/13 00:18:19 jsg Exp $ */
/* $NetBSD: reg.h,v 1.1 2003/04/26 18:39:47 fvdl Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* This code is derived from software contributed to Berkeley by
* William Jolitz.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)reg.h 5.5 (Berkeley) 1/18/91
*/
#ifndef _AMD64_REG_H_
#define _AMD64_REG_H_
#include <machine/mcontext.h>
#include <machine/fpu.h>
/*
* XXX
* The #defines aren't used in the kernel, but some user-level code still
* expects them.
*/
/* When referenced during a trap/exception, registers are at these offsets */
#define tRDI 0
#define tRSI 1
#define tRDX 2
#define tRCX 3
#define tR8 4
#define tR9 5
#define tR10 6
#define tR11 7
#define tR12 8
#define tR13 9
#define tR14 10
#define tR15 11
#define tRBP 12
#define tRBX 13
#define tRAX 14
#define tRSP 15
#define tRIP 16
#define tRFLAGS 17
#define tCS 18
#define tSS 19
#define tDS 20
#define tES 21
#define tFS 22
#define tGS 23
/*
* Registers accessible to ptrace(2) syscall for debugger use.
* Same as mcontext.__gregs and struct trapframe, they must
* remain synced (XXX should use common structure).
*/
struct reg {
int64_t r_rdi;
int64_t r_rsi;
int64_t r_rdx;
int64_t r_rcx;
int64_t r_r8;
int64_t r_r9;
int64_t r_r10;
int64_t r_r11;
int64_t r_r12;
int64_t r_r13;
int64_t r_r14;
int64_t r_r15;
int64_t r_rbp;
int64_t r_rbx;
int64_t r_rax;
int64_t r_rsp;
int64_t r_rip;
int64_t r_rflags;
int64_t r_cs;
int64_t r_ss;
int64_t r_ds;
int64_t r_es;
int64_t r_fs;
int64_t r_gs;
};
struct fpreg {
struct fxsave64 fxstate;
};
#define fp_fcw fxstate.fx_fcw
#define fp_fsw fxstate.fx_fsw
#define fp_ftw fxstate.fx_ftw
#define fp_fop fxstate.fx_fop
#define fp_rip fxstate.fx_rip
#define fp_rdp fxstate.fx_rdp
#define fp_mxcsr fxstate.fx_mxcsr
#define fp_mxcsr_mask fxstate.fx_mxcsr_mask
#define fp_st fxstate.fx_st
#define fp_xmm fxstate.fx_xmm
#ifdef _KERNEL
int check_context(const struct reg *, struct trapframe *);
#endif
#endif /* !_AMD64_REG_H_ */