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Annotation of sys/arch/amd64/include/i82489var.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $NetBSD: i82489var.h,v 1.1 2003/02/26 21:26:10 fvdl Exp $       */
                      2:
                      3: /*-
                      4:  * Copyright (c) 1998 The NetBSD Foundation, Inc.
                      5:  * All rights reserved.
                      6:  *
                      7:  * This code is derived from software contributed to The NetBSD Foundation
                      8:  * by Frank van der Linden.
                      9:  *
                     10:  * Redistribution and use in source and binary forms, with or without
                     11:  * modification, are permitted provided that the following conditions
                     12:  * are met:
                     13:  * 1. Redistributions of source code must retain the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer.
                     15:  * 2. Redistributions in binary form must reproduce the above copyright
                     16:  *    notice, this list of conditions and the following disclaimer in the
                     17:  *    documentation and/or other materials provided with the distribution.
                     18:  * 3. All advertising materials mentioning features or use of this software
                     19:  *    must display the following acknowledgement:
                     20:  *     This product includes software developed by the NetBSD
                     21:  *     Foundation, Inc. and its contributors.
                     22:  * 4. Neither the name of The NetBSD Foundation nor the names of its
                     23:  *    contributors may be used to endorse or promote products derived
                     24:  *    from this software without specific prior written permission.
                     25:  *
                     26:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     27:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     28:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     29:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     30:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     31:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     32:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     33:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     34:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     35:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     36:  * POSSIBILITY OF SUCH DAMAGE.
                     37:  */
                     38:
                     39: #ifndef _X86_I82489REG_H_
                     40: #define _X86_I82489REG_H_
                     41:
                     42: /*
                     43:  * Software definitions belonging to Local APIC driver.
                     44:  */
                     45:
                     46: static __inline__ u_int32_t i82489_readreg(int);
                     47: static __inline__ void i82489_writereg(int, u_int32_t);
                     48:
                     49: #ifdef _KERNEL
                     50: extern volatile u_int32_t local_apic[];
                     51: extern volatile u_int32_t lapic_tpr;
                     52: #endif
                     53:
                     54: static __inline__ u_int32_t
                     55: i82489_readreg(reg)
                     56:        int reg;
                     57: {
                     58:        return *((volatile u_int32_t *)(((volatile u_int8_t *)local_apic)
                     59:            + reg));
                     60: }
                     61:
                     62: static __inline__ void
                     63: i82489_writereg(reg, val)
                     64:        int reg;
                     65:        u_int32_t val;
                     66: {
                     67:        *((volatile u_int32_t *)(((volatile u_int8_t *)local_apic) + reg)) = val;
                     68: }
                     69:
                     70: #define lapic_cpu_number()     (i82489_readreg(LAPIC_ID)>>LAPIC_ID_SHIFT)
                     71:
                     72: /*
                     73:  * "spurious interrupt vector"; vector used by interrupt which was
                     74:  * aborted because the CPU masked it after it happened but before it
                     75:  * was delivered.. "Oh, sorry, i caught you at a bad time".
                     76:  * Low-order 4 bits must be all ones.
                     77:  */
                     78: extern void Xintrspurious(void);
                     79: #define LAPIC_SPURIOUS_VECTOR          0xef
                     80:
                     81: /*
                     82:  * Vector used for inter-processor interrupts.
                     83:  */
                     84: extern void Xintr_lapic_ipi(void);
                     85: extern void Xrecurse_lapic_ipi(void);
                     86: extern void Xresume_lapic_ipi(void);
                     87: #define LAPIC_IPI_VECTOR                       0xe0
                     88:
                     89: /*
                     90:  * We take 0xf0-0xfe for fast IPI handlers.
                     91:  */
                     92: #define LAPIC_IPI_OFFSET                       0xf0
                     93: #define LAPIC_IPI_INVLTLB                      (LAPIC_IPI_OFFSET + 0)
                     94: #define LAPIC_IPI_INVLPG                       (LAPIC_IPI_OFFSET + 1)
                     95: #define LAPIC_IPI_INVLRANGE                    (LAPIC_IPI_OFFSET + 2)
                     96:
                     97: extern void Xipi_invltlb(void);
                     98: extern void Xipi_invlpg(void);
                     99: extern void Xipi_invlrange(void);
                    100:
                    101: /*
                    102:  * Vector used for local apic timer interrupts.
                    103:  */
                    104:
                    105: extern void Xintr_lapic_ltimer(void);
                    106: extern void Xresume_lapic_ltimer(void);
                    107: extern void Xrecurse_lapic_ltimer(void);
                    108: #define LAPIC_TIMER_VECTOR             0xc0
                    109:
                    110: /*
                    111:  * 'pin numbers' for local APIC
                    112:  */
                    113: #define LAPIC_PIN_TIMER                0
                    114: #define LAPIC_PIN_PCINT                2
                    115: #define LAPIC_PIN_LVINT0       3
                    116: #define LAPIC_PIN_LVINT1       4
                    117: #define LAPIC_PIN_LVERR                5
                    118:
                    119: extern void Xintr_lapic0(void);
                    120: extern void Xintr_lapic2(void);
                    121: extern void Xintr_lapic3(void);
                    122: extern void Xintr_lapic4(void);
                    123: extern void Xintr_lapic5(void);
                    124:
                    125:
                    126: struct cpu_info;
                    127:
                    128: extern void lapic_boot_init(paddr_t);
                    129: extern void lapic_set_lvt(void);
                    130: extern void lapic_enable(void);
                    131: extern void lapic_calibrate_timer(struct cpu_info *ci);
                    132: extern void lapic_initclocks(void);
                    133:
                    134: #endif