Annotation of sys/arch/amd64/include/fpu.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: fpu.h,v 1.3 2006/10/01 10:52:10 kettenis Exp $ */
2: /* $NetBSD: fpu.h,v 1.1 2003/04/26 18:39:40 fvdl Exp $ */
3:
4: #ifndef _AMD64_FPU_H_
5: #define _AMD64_FPU_H_
6:
7: #include <sys/types.h>
8:
9: /*
10: * amd64 only uses the extended save/restore format used
11: * by fxsave/fsrestore, to always deal with the SSE registers,
12: * which are part of the ABI to pass floating point values.
13: * Must be stored in memory on a 16-byte boundary.
14: */
15:
16: struct fxsave64 {
17: u_int16_t fx_fcw;
18: u_int16_t fx_fsw;
19: u_int8_t fx_ftw;
20: u_int8_t fx_unused1;
21: u_int16_t fx_fop;
22: u_int64_t fx_rip;
23: u_int64_t fx_rdp;
24: u_int32_t fx_mxcsr;
25: u_int32_t fx_mxcsr_mask;
26: u_int64_t fx_st[8][2]; /* 8 normal FP regs */
27: u_int64_t fx_xmm[16][2]; /* 16 SSE2 registers */
28: u_int8_t fx_unused3[96];
29: } __attribute__((packed));
30:
31: struct savefpu {
32: struct fxsave64 fp_fxsave; /* see above */
33: u_int16_t fp_ex_sw; /* saved status from last exception */
34: u_int16_t fp_ex_tw; /* saved tag from last exception */
35: };
36:
37: /*
38: * The i387 defaults to Intel extended precision mode and round to nearest,
39: * with all exceptions masked.
40: */
41: #define __INITIAL_NPXCW__ 0x037f
42: #define __INITIAL_MXCSR__ 0x1f80
43: #define __INITIAL_MXCSR_MASK__ 0xffbf
44:
45: #ifdef _KERNEL
46: /*
47: * XXX
48: */
49: struct trapframe;
50: struct cpu_info;
51:
52: void fpuinit(struct cpu_info *);
53: void fpudrop(void);
54: void fpusave(struct proc *);
55: void fpudiscard(struct proc *);
56: void fputrap(struct trapframe *);
57: void fpusave_proc(struct proc *, int);
58: void fpusave_cpu(struct cpu_info *, int);
59:
60: #endif
61:
62: #endif /* _AMD64_FPU_H_ */
CVSweb