Annotation of sys/arch/alpha/tc/tc_3000_500.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: tc_3000_500.h,v 1.5 2002/05/02 22:56:06 miod Exp $ */
! 2: /* $NetBSD: tc_3000_500.h,v 1.4 1998/10/22 01:03:09 briggs Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 1994, 1995 Carnegie-Mellon University.
! 6: * All rights reserved.
! 7: *
! 8: * Author: Chris G. Demetriou
! 9: *
! 10: * Permission to use, copy, modify and distribute this software and
! 11: * its documentation is hereby granted, provided that both the copyright
! 12: * notice and this permission notice appear in all copies of the
! 13: * software, derivative works or modified versions, and any portions
! 14: * thereof, and that both notices appear in supporting documentation.
! 15: *
! 16: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
! 17: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
! 18: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
! 19: *
! 20: * Carnegie Mellon requests users of this software to return to
! 21: *
! 22: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
! 23: * School of Computer Science
! 24: * Carnegie Mellon University
! 25: * Pittsburgh PA 15213-3890
! 26: *
! 27: * any improvements or extensions that they make and grant Carnegie the
! 28: * rights to redistribute these changes.
! 29: */
! 30:
! 31: /*
! 32: * TurboChannel-specific functions and structures for 3000_500.
! 33: */
! 34:
! 35: /*
! 36: * TURBOchannel Interface Registers.
! 37: *
! 38: * XXX
! 39: * Writing to TC_3000_500_TCRESET appears to kill the 400 we're using.
! 40: */
! 41: #define TC_3000_500_IOSLOT KV(0x00000001c2000000) /* Dense */
! 42: #define TC_3000_500_TCCONFIG KV(0x00000001c2000008) /* Dense */
! 43: #define TC_3000_500_FADR KV(0x00000001c2000010) /* Dense */
! 44: #define TC_3000_500_TCEREG KV(0x00000001c2000018) /* Dense */
! 45: #define TC_3000_500_MEMCONF KV(0x00000001c2200000) /* Dense */
! 46: #define TC_3000_500_IMR_READ KV(0x00000001c2400000) /* Dense */
! 47: #define TC_3000_500_IMR_WRITE KV(0x00000001c281fffc) /* Dense */
! 48: #define TC_3000_500_TCRESET KV(0x00000001c2a00000) /* Dense */
! 49: #define TC_3000_500_IR KV(0x00000001d4800000) /* Sparse */
! 50: #define TC_3000_500_IR_CLEAR KV(0x00000001d4c00000) /* Sparse */
! 51: #define TC_3000_500_SCMAP KV(0x00000001d5000000) /* Sparse */
! 52:
! 53: /* Interrupt bits. */
! 54: #define TC_3000_500_IR_OPT0 0x00000001 /* TC Option 0 */
! 55: #define TC_3000_500_IR_OPT1 0x00000002 /* TC Option 1 */
! 56: #define TC_3000_500_IR_OPT2 0x00000004 /* TC Option 2 */
! 57: #define TC_3000_500_IR_OPT3 0x00000008 /* TC Option 3 */
! 58: #define TC_3000_500_IR_OPT4 0x00000010 /* TC Option 4 */
! 59: #define TC_3000_500_IR_OPT5 0x00000020 /* TC Option 5 */
! 60: #define TC_3000_500_IR_TCDS 0x00000040 /* TC Dual SCSI */
! 61: #define TC_3000_500_IR_IOASIC 0x00000080 /* TC IOASIC */
! 62: #define TC_3000_500_IR_CXTURBO 0x00000100 /* TC CXTURBO */
! 63: #define TC_3000_500_IR_ERR2 0x00080000 /* Second error */
! 64: #define TC_3000_500_IR_DMABE 0x00100000 /* DMA buffer error */
! 65: #define TC_3000_500_IR_DMA2K 0x00200000 /* DMA 2K boundary */
! 66: #define TC_3000_500_IR_TCRESET 0x00400000 /* TC reset in prog. */
! 67: #define TC_3000_500_IR_TCPAR 0x00800000 /* TC parity error */
! 68: #define TC_3000_500_IR_DMATAG 0x01000000 /* DMA tag error */
! 69: #define TC_3000_500_IR_DMASBE 0x02000000 /* Single-bit error */
! 70: #define TC_3000_500_IR_DMADBE 0x04000000 /* Double-bit error */
! 71: #define TC_3000_500_IR_TCTIMEOUT 0x08000000 /* TC timeout on I/O */
! 72: #define TC_3000_500_IR_DMABLOCK 0x10000000 /* DMA block too long */
! 73: #define TC_3000_500_IR_IOADDR 0x20000000 /* Invalid I/O addr */
! 74: #define TC_3000_500_IR_DMASG 0x40000000 /* SG invalid */
! 75: #define TC_3000_500_IR_SGPAR 0x80000000 /* SG parity error */
! 76:
! 77: /* I/O Slot Configuration (IOSLOT) bits. */
! 78: #define IOSLOT_P 0x04 /* Parity enable. */
! 79: #define IOSLOT_B 0x02 /* Block-mode write. */
! 80: #define IOSLOT_S 0x01 /* DMA scatter/gather mode. */
! 81:
! 82: /* I/O Slot Configuration (IOSLOT) offsets. */
! 83: #define TC_IOSLOT_OPT0 0 /* Option 0 PBS offset. */
! 84: #define TC_IOSLOT_OPT1 1 /* Option 1 PBS offset. */
! 85: #define TC_IOSLOT_OPT2 2 /* Option 2 PBS offset. */
! 86: #define TC_IOSLOT_OPT3 3 /* Option 3 PBS offset. */
! 87: #define TC_IOSLOT_OPT4 4 /* Option 4 PBS offset. */
! 88: #define TC_IOSLOT_OPT5 5 /* Option 5 PBS offset. */
! 89: #define TC_IOSLOT_SCSI 6 /* Option SCSI PBS offset. */
! 90: #define TC_IOSLOT_IOASIC 7 /* Option IOASIC PBS offset. */
! 91: #define TC_IOSLOT_CXTURBO 8 /* Option CXTURBO PBS offset. */
! 92:
! 93: /* Device number "cookies." */
! 94: #define TC_3000_500_DEV_OPT0 0
! 95: #define TC_3000_500_DEV_OPT1 1
! 96: #define TC_3000_500_DEV_OPT2 2
! 97: #define TC_3000_500_DEV_OPT3 3
! 98: #define TC_3000_500_DEV_OPT4 4
! 99: #define TC_3000_500_DEV_OPT5 5
! 100: #define TC_3000_500_DEV_TCDS 6
! 101: #define TC_3000_500_DEV_IOASIC 7
! 102: #define TC_3000_500_DEV_CXTURBO 8
! 103:
! 104: #define TC_3000_500_DEV_BOGUS -1
! 105:
! 106: #define TC_3000_500_NCOOKIES 9
! 107:
! 108: extern int tc_3000_500_fb_cnattach(u_int64_t);
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