Annotation of sys/arch/alpha/pci/tsvar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: tsvar.h,v 1.6 2006/03/16 22:32:44 miod Exp $ */
2: /* $NetBSD: tsvar.h,v 1.1 1999/06/29 06:46:47 ross Exp $ */
3:
4: /*-
5: * Copyright (c) 1999 by Ross Harvey. All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: * 3. All advertising materials mentioning features or use of this software
16: * must display the following acknowledgement:
17: * This product includes software developed by Ross Harvey.
18: * 4. The name of Ross Harvey may not be used to endorse or promote products
19: * derived from this software without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
22: * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
24: * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
25: * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: *
33: */
34:
35: #include <dev/isa/isavar.h>
36: #include <dev/pci/pcivar.h>
37: #include <alpha/pci/pci_sgmap_pte64.h>
38:
39: #define tsvar() { Generate ctags(1) key. }
40:
41: struct tsp_config {
42: int pc_pslot; /* Pchip 0 or 1 */
43: int pc_initted; /* Initialized */
44: u_int64_t pc_iobase; /* All Pchip space starts here */
45: struct ts_pchip *pc_csr; /* Pchip CSR space starts here */
46:
47: struct alpha_bus_space pc_iot, pc_memt;
48: struct alpha_pci_chipset pc_pc;
49:
50: struct alpha_bus_dma_tag pc_dmat_direct;
51: struct alpha_bus_dma_tag pc_dmat_sgmap;
52:
53: struct alpha_sgmap pc_sgmap;
54:
55: u_int32_t pc_hae_mem;
56: u_int32_t pc_hae_io;
57:
58: struct extent *pc_io_ex, *pc_mem_ex;
59: char pc_io_ex_name[16], pc_mem_ex_name[16];
60: long pc_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
61: long pc_mem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
62: int pc_mallocsafe;
63: };
64:
65: struct tsp_softc {
66: struct device sc_dev;
67: struct tsp_config *sc_ccp;
68: };
69:
70: struct tsp_attach_args {
71: char *tsp_name;
72: int tsp_slot;
73: };
74:
75: extern int tsp_console_hose;
76:
77: struct tsp_config *tsp_init(int, int);
78: void tsp_pci_init(pci_chipset_tag_t, void *);
79: void tsp_dma_init(struct tsp_config *);
80:
81: void tsp_bus_io_init(bus_space_tag_t, void *);
82: void tsp_bus_mem_init(bus_space_tag_t, void *);
83:
84: void tsp_bus_mem_init2(void *);
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