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1.1 nbrk 1: /* $OpenBSD: pci_swiz_bus_mem_chipdep.c,v 1.4 2007/03/16 21:22:27 robert Exp $ */
2: /* $NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $ */
3:
4: /*
5: * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6: * All rights reserved.
7: *
8: * Author: Chris G. Demetriou
9: *
10: * Permission to use, copy, modify and distribute this software and
11: * its documentation is hereby granted, provided that both the copyright
12: * notice and this permission notice appear in all copies of the
13: * software, derivative works or modified versions, and any portions
14: * thereof, and that both notices appear in supporting documentation.
15: *
16: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19: *
20: * Carnegie Mellon requests users of this software to return to
21: *
22: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23: * School of Computer Science
24: * Carnegie Mellon University
25: * Pittsburgh PA 15213-3890
26: *
27: * any improvements or extensions that they make and grant Carnegie the
28: * rights to redistribute these changes.
29: */
30:
31: /*
32: * Common PCI Chipset "bus I/O" functions, for chipsets which have to
33: * deal with only a single PCI interface chip in a machine.
34: *
35: * uses:
36: * CHIP name of the 'chip' it's being compiled for.
37: * CHIP_D_MEM_BASE Dense Mem space base to use.
38: * CHIP_S_MEM_BASE Sparse Mem space base to use.
39: */
40:
41: #include <sys/extent.h>
42:
43: #define __C(A,B) __CONCAT(A,B)
44: #define __S(S) __STRING(S)
45:
46: #ifndef CHIP_EXTENT_DNAME
47: #define CHIP_EXTENT_DNAME(v) __S(__C(CHIP,_bus_dmem))
48: #endif
49: #ifndef CHIP_EXTENT_SNAME
50: #define CHIP_EXTENT_SNAME(v) __S(__C(CHIP,_bus_smem))
51: #endif
52:
53: #ifndef CHIP_EXTENT_DSTORAGE
54: #define CHIP_EXTENT_DSTORAGE(v) __C(CHIP,_dmem_ex_storage)
55: static long
56: __C(CHIP,_dmem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
57: #endif
58: #ifndef CHIP_EXTENT_SSTORAGE
59: #define CHIP_EXTENT_SSTORAGE(v) __C(CHIP,_smem_ex_storage)
60: static long
61: __C(CHIP,_smem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
62:
63: #endif
64:
65: /* mapping/unmapping */
66: int __C(CHIP,_mem_map)(void *, bus_addr_t, bus_size_t, int,
67: bus_space_handle_t *);
68: void __C(CHIP,_mem_unmap)(void *, bus_space_handle_t,
69: bus_size_t);
70: int __C(CHIP,_mem_subregion)(void *, bus_space_handle_t,
71: bus_size_t, bus_size_t, bus_space_handle_t *);
72:
73: /* allocation/deallocation */
74: int __C(CHIP,_mem_alloc)(void *, bus_addr_t, bus_addr_t,
75: bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *,
76: bus_space_handle_t *);
77: void __C(CHIP,_mem_free)(void *, bus_space_handle_t,
78: bus_size_t);
79:
80: /* barrier */
81: inline void __C(CHIP,_mem_barrier)(void *, bus_space_handle_t,
82: bus_size_t, bus_size_t, int);
83:
84: /* read (single) */
85: inline u_int8_t __C(CHIP,_mem_read_1)(void *, bus_space_handle_t,
86: bus_size_t);
87: inline u_int16_t __C(CHIP,_mem_read_2)(void *, bus_space_handle_t,
88: bus_size_t);
89: inline u_int32_t __C(CHIP,_mem_read_4)(void *, bus_space_handle_t,
90: bus_size_t);
91: inline u_int64_t __C(CHIP,_mem_read_8)(void *, bus_space_handle_t,
92: bus_size_t);
93:
94: /* read multiple */
95: void __C(CHIP,_mem_read_multi_1)(void *, bus_space_handle_t,
96: bus_size_t, u_int8_t *, bus_size_t);
97: void __C(CHIP,_mem_read_multi_2)(void *, bus_space_handle_t,
98: bus_size_t, u_int16_t *, bus_size_t);
99: void __C(CHIP,_mem_read_multi_4)(void *, bus_space_handle_t,
100: bus_size_t, u_int32_t *, bus_size_t);
101: void __C(CHIP,_mem_read_multi_8)(void *, bus_space_handle_t,
102: bus_size_t, u_int64_t *, bus_size_t);
103:
104: /* read region */
105: void __C(CHIP,_mem_read_region_1)(void *, bus_space_handle_t,
106: bus_size_t, u_int8_t *, bus_size_t);
107: void __C(CHIP,_mem_read_region_2)(void *, bus_space_handle_t,
108: bus_size_t, u_int16_t *, bus_size_t);
109: void __C(CHIP,_mem_read_region_4)(void *, bus_space_handle_t,
110: bus_size_t, u_int32_t *, bus_size_t);
111: void __C(CHIP,_mem_read_region_8)(void *, bus_space_handle_t,
112: bus_size_t, u_int64_t *, bus_size_t);
113:
114: /* write (single) */
115: inline void __C(CHIP,_mem_write_1)(void *, bus_space_handle_t,
116: bus_size_t, u_int8_t);
117: inline void __C(CHIP,_mem_write_2)(void *, bus_space_handle_t,
118: bus_size_t, u_int16_t);
119: inline void __C(CHIP,_mem_write_4)(void *, bus_space_handle_t,
120: bus_size_t, u_int32_t);
121: inline void __C(CHIP,_mem_write_8)(void *, bus_space_handle_t,
122: bus_size_t, u_int64_t);
123:
124: /* write multiple */
125: void __C(CHIP,_mem_write_multi_1)(void *, bus_space_handle_t,
126: bus_size_t, const u_int8_t *, bus_size_t);
127: void __C(CHIP,_mem_write_multi_2)(void *, bus_space_handle_t,
128: bus_size_t, const u_int16_t *, bus_size_t);
129: void __C(CHIP,_mem_write_multi_4)(void *, bus_space_handle_t,
130: bus_size_t, const u_int32_t *, bus_size_t);
131: void __C(CHIP,_mem_write_multi_8)(void *, bus_space_handle_t,
132: bus_size_t, const u_int64_t *, bus_size_t);
133:
134: /* write region */
135: void __C(CHIP,_mem_write_region_1)(void *, bus_space_handle_t,
136: bus_size_t, const u_int8_t *, bus_size_t);
137: void __C(CHIP,_mem_write_region_2)(void *, bus_space_handle_t,
138: bus_size_t, const u_int16_t *, bus_size_t);
139: void __C(CHIP,_mem_write_region_4)(void *, bus_space_handle_t,
140: bus_size_t, const u_int32_t *, bus_size_t);
141: void __C(CHIP,_mem_write_region_8)(void *, bus_space_handle_t,
142: bus_size_t, const u_int64_t *, bus_size_t);
143:
144: /* set multiple */
145: void __C(CHIP,_mem_set_multi_1)(void *, bus_space_handle_t,
146: bus_size_t, u_int8_t, bus_size_t);
147: void __C(CHIP,_mem_set_multi_2)(void *, bus_space_handle_t,
148: bus_size_t, u_int16_t, bus_size_t);
149: void __C(CHIP,_mem_set_multi_4)(void *, bus_space_handle_t,
150: bus_size_t, u_int32_t, bus_size_t);
151: void __C(CHIP,_mem_set_multi_8)(void *, bus_space_handle_t,
152: bus_size_t, u_int64_t, bus_size_t);
153:
154: /* set region */
155: void __C(CHIP,_mem_set_region_1)(void *, bus_space_handle_t,
156: bus_size_t, u_int8_t, bus_size_t);
157: void __C(CHIP,_mem_set_region_2)(void *, bus_space_handle_t,
158: bus_size_t, u_int16_t, bus_size_t);
159: void __C(CHIP,_mem_set_region_4)(void *, bus_space_handle_t,
160: bus_size_t, u_int32_t, bus_size_t);
161: void __C(CHIP,_mem_set_region_8)(void *, bus_space_handle_t,
162: bus_size_t, u_int64_t, bus_size_t);
163:
164: /* copy */
165: void __C(CHIP,_mem_copy_1)(void *, bus_space_handle_t,
166: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
167: void __C(CHIP,_mem_copy_2)(void *, bus_space_handle_t,
168: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
169: void __C(CHIP,_mem_copy_4)(void *, bus_space_handle_t,
170: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
171: void __C(CHIP,_mem_copy_8)(void *, bus_space_handle_t,
172: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
173:
174: /* read multiple raw */
175: void __C(CHIP,_mem_read_raw_multi_2)(void *,
176: bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
177: void __C(CHIP,_mem_read_raw_multi_4)(void *,
178: bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
179: void __C(CHIP,_mem_read_raw_multi_8)(void *,
180: bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
181:
182: /* write multiple raw */
183: void __C(CHIP,_mem_write_raw_multi_2)(void *,
184: bus_space_handle_t, bus_size_t, const u_int8_t *,
185: bus_size_t);
186: void __C(CHIP,_mem_write_raw_multi_4)(void *,
187: bus_space_handle_t, bus_size_t, const u_int8_t *,
188: bus_size_t);
189: void __C(CHIP,_mem_write_raw_multi_8)(void *,
190: bus_space_handle_t, bus_size_t, const u_int8_t *,
191: bus_size_t);
192:
193: void
194: __C(CHIP,_bus_mem_init)(t, v)
195: bus_space_tag_t t;
196: void *v;
197: {
198: struct extent *dex, *sex;
199:
200: /*
201: * Initialize the bus space tag.
202: */
203:
204: /* cookie */
205: t->abs_cookie = v;
206:
207: /* mapping/unmapping */
208: t->abs_map = __C(CHIP,_mem_map);
209: t->abs_unmap = __C(CHIP,_mem_unmap);
210: t->abs_subregion = __C(CHIP,_mem_subregion);
211:
212: /* allocation/deallocation */
213: t->abs_alloc = __C(CHIP,_mem_alloc);
214: t->abs_free = __C(CHIP,_mem_free);
215:
216: /* barrier */
217: t->abs_barrier = __C(CHIP,_mem_barrier);
218:
219: /* read (single) */
220: t->abs_r_1 = __C(CHIP,_mem_read_1);
221: t->abs_r_2 = __C(CHIP,_mem_read_2);
222: t->abs_r_4 = __C(CHIP,_mem_read_4);
223: t->abs_r_8 = __C(CHIP,_mem_read_8);
224:
225: /* read multiple */
226: t->abs_rm_1 = __C(CHIP,_mem_read_multi_1);
227: t->abs_rm_2 = __C(CHIP,_mem_read_multi_2);
228: t->abs_rm_4 = __C(CHIP,_mem_read_multi_4);
229: t->abs_rm_8 = __C(CHIP,_mem_read_multi_8);
230:
231: /* read region */
232: t->abs_rr_1 = __C(CHIP,_mem_read_region_1);
233: t->abs_rr_2 = __C(CHIP,_mem_read_region_2);
234: t->abs_rr_4 = __C(CHIP,_mem_read_region_4);
235: t->abs_rr_8 = __C(CHIP,_mem_read_region_8);
236:
237: /* write (single) */
238: t->abs_w_1 = __C(CHIP,_mem_write_1);
239: t->abs_w_2 = __C(CHIP,_mem_write_2);
240: t->abs_w_4 = __C(CHIP,_mem_write_4);
241: t->abs_w_8 = __C(CHIP,_mem_write_8);
242:
243: /* write multiple */
244: t->abs_wm_1 = __C(CHIP,_mem_write_multi_1);
245: t->abs_wm_2 = __C(CHIP,_mem_write_multi_2);
246: t->abs_wm_4 = __C(CHIP,_mem_write_multi_4);
247: t->abs_wm_8 = __C(CHIP,_mem_write_multi_8);
248:
249: /* write region */
250: t->abs_wr_1 = __C(CHIP,_mem_write_region_1);
251: t->abs_wr_2 = __C(CHIP,_mem_write_region_2);
252: t->abs_wr_4 = __C(CHIP,_mem_write_region_4);
253: t->abs_wr_8 = __C(CHIP,_mem_write_region_8);
254:
255: /* set multiple */
256: t->abs_sm_1 = __C(CHIP,_mem_set_multi_1);
257: t->abs_sm_2 = __C(CHIP,_mem_set_multi_2);
258: t->abs_sm_4 = __C(CHIP,_mem_set_multi_4);
259: t->abs_sm_8 = __C(CHIP,_mem_set_multi_8);
260:
261: /* set region */
262: t->abs_sr_1 = __C(CHIP,_mem_set_region_1);
263: t->abs_sr_2 = __C(CHIP,_mem_set_region_2);
264: t->abs_sr_4 = __C(CHIP,_mem_set_region_4);
265: t->abs_sr_8 = __C(CHIP,_mem_set_region_8);
266:
267: /* copy */
268: t->abs_c_1 = __C(CHIP,_mem_copy_1);
269: t->abs_c_2 = __C(CHIP,_mem_copy_2);
270: t->abs_c_4 = __C(CHIP,_mem_copy_4);
271: t->abs_c_8 = __C(CHIP,_mem_copy_8);
272:
273: /* read multiple raw */
274: t->abs_rrm_2 = __C(CHIP,_mem_read_raw_multi_2);
275: t->abs_rrm_4 = __C(CHIP,_mem_read_raw_multi_4);
276: t->abs_rrm_8 = __C(CHIP,_mem_read_raw_multi_8);
277:
278: /* write multiple raw*/
279: t->abs_wrm_2 = __C(CHIP,_mem_write_raw_multi_2);
280: t->abs_wrm_4 = __C(CHIP,_mem_write_raw_multi_4);
281: t->abs_wrm_8 = __C(CHIP,_mem_write_raw_multi_8);
282:
283: /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
284: dex = extent_create(CHIP_EXTENT_DNAME(v), 0x0UL,
285: 0xffffffffffffffffUL, M_DEVBUF,
286: (caddr_t)CHIP_EXTENT_DSTORAGE(v),
287: sizeof(CHIP_EXTENT_DSTORAGE(v)), EX_NOWAIT);
288: extent_alloc_region(dex, 0, 0xffffffffffffffffUL, EX_NOWAIT);
289:
290: #ifdef CHIP_D_MEM_W1_BUS_START
291: #ifdef EXTENT_DEBUG
292: printf("dmem: freeing from 0x%lx to 0x%lx\n",
293: CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v));
294: #endif
295: extent_free(dex, CHIP_D_MEM_W1_BUS_START(v),
296: CHIP_D_MEM_W1_BUS_END(v) - CHIP_D_MEM_W1_BUS_START(v) + 1,
297: EX_NOWAIT);
298: #endif
299:
300: #ifdef EXTENT_DEBUG
301: extent_print(dex);
302: #endif
303: CHIP_D_MEM_EXTENT(v) = dex;
304:
305: /* XXX WE WANT EXTENT_NOCOALESCE, BUT WE CAN'T USE IT. XXX */
306: sex = extent_create(CHIP_EXTENT_SNAME(v), 0x0UL,
307: 0xffffffffffffffffUL, M_DEVBUF,
308: (caddr_t)CHIP_EXTENT_SSTORAGE(v),
309: sizeof(CHIP_EXTENT_SSTORAGE(v)), EX_NOWAIT);
310: extent_alloc_region(sex, 0, 0xffffffffffffffffUL, EX_NOWAIT);
311:
312: #ifdef CHIP_S_MEM_W1_BUS_START
313: #ifdef EXTENT_DEBUG
314: printf("smem: freeing from 0x%lx to 0x%lx\n",
315: CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v));
316: #endif
317: extent_free(sex, CHIP_S_MEM_W1_BUS_START(v),
318: CHIP_S_MEM_W1_BUS_END(v) - CHIP_S_MEM_W1_BUS_START(v) + 1,
319: EX_NOWAIT);
320: #endif
321: #ifdef CHIP_S_MEM_W2_BUS_START
322: if (CHIP_S_MEM_W2_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v)) {
323: #ifdef EXTENT_DEBUG
324: printf("smem: freeing from 0x%lx to 0x%lx\n",
325: CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
326: #endif
327: extent_free(sex, CHIP_S_MEM_W2_BUS_START(v),
328: CHIP_S_MEM_W2_BUS_END(v) - CHIP_S_MEM_W2_BUS_START(v) + 1,
329: EX_NOWAIT);
330: } else {
331: #ifdef EXTENT_DEBUG
332: printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
333: CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
334: #endif
335: }
336: #endif
337: #ifdef CHIP_S_MEM_W3_BUS_START
338: if (CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W1_BUS_START(v) &&
339: CHIP_S_MEM_W3_BUS_START(v) != CHIP_S_MEM_W2_BUS_START(v)) {
340: #ifdef EXTENT_DEBUG
341: printf("smem: freeing from 0x%lx to 0x%lx\n",
342: CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v));
343: #endif
344: extent_free(sex, CHIP_S_MEM_W3_BUS_START(v),
345: CHIP_S_MEM_W3_BUS_END(v) - CHIP_S_MEM_W3_BUS_START(v) + 1,
346: EX_NOWAIT);
347: } else {
348: #ifdef EXTENT_DEBUG
349: printf("smem: window 2 (0x%lx to 0x%lx) overlaps window 1\n",
350: CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
351: #endif
352: }
353: #endif
354:
355: #ifdef EXTENT_DEBUG
356: extent_print(sex);
357: #endif
358: CHIP_S_MEM_EXTENT(v) = sex;
359: }
360:
361: static int __C(CHIP,_xlate_addr_to_dense_handle)(void *,
362: bus_addr_t, bus_space_handle_t *);
363: static int __C(CHIP,_xlate_dense_handle_to_addr)(void *,
364: bus_space_handle_t, bus_addr_t *);
365: static int __C(CHIP,_xlate_addr_to_sparse_handle)(void *,
366: bus_addr_t, bus_space_handle_t *);
367: static int __C(CHIP,_xlate_sparse_handle_to_addr)(void *,
368: bus_space_handle_t, bus_addr_t *);
369:
370: static int
371: __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, memhp)
372: void *v;
373: bus_addr_t memaddr;
374: bus_space_handle_t *memhp;
375: {
376: #ifdef CHIP_D_MEM_W1_BUS_START
377: if (memaddr >= CHIP_D_MEM_W1_BUS_START(v) &&
378: memaddr <= CHIP_D_MEM_W1_BUS_END(v)) {
379: *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_D_MEM_W1_SYS_START(v)) +
380: (memaddr - CHIP_D_MEM_W1_BUS_START(v));
381: return (1);
382: } else
383: #endif
384: return (0);
385: }
386:
387: static int
388: __C(CHIP,_xlate_dense_handle_to_addr)(v, memh, memaddrp)
389: void *v;
390: bus_space_handle_t memh;
391: bus_addr_t *memaddrp;
392: {
393:
394: memh = ALPHA_K0SEG_TO_PHYS(memh);
395:
396: #ifdef CHIP_D_MEM_W1_BUS_START
397: if (memh >= CHIP_D_MEM_W1_SYS_START(v) &&
398: memh <= CHIP_D_MEM_W1_SYS_END(v)) {
399: *memaddrp = CHIP_D_MEM_W1_BUS_START(v) +
400: (memh - CHIP_D_MEM_W1_SYS_START(v));
401: return (1);
402: } else
403: #endif
404: return (0);
405: }
406:
407: static int
408: __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
409: void *v;
410: bus_addr_t memaddr;
411: bus_space_handle_t *memhp;
412: {
413:
414: #ifdef CHIP_S_MEM_W1_BUS_START
415: if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) &&
416: memaddr <= CHIP_S_MEM_W1_BUS_END(v)) {
417: *memhp =
418: (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 5) +
419: (memaddr - CHIP_S_MEM_W1_BUS_START(v));
420: return (1);
421: } else
422: #endif
423: #ifdef CHIP_S_MEM_W2_BUS_START
424: if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) &&
425: memaddr <= CHIP_S_MEM_W2_BUS_END(v)) {
426: *memhp =
427: (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 5) +
428: (memaddr - CHIP_S_MEM_W2_BUS_START(v));
429: return (1);
430: } else
431: #endif
432: #ifdef CHIP_S_MEM_W3_BUS_START
433: if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) &&
434: memaddr <= CHIP_S_MEM_W3_BUS_END(v)) {
435: *memhp =
436: (ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 5) +
437: (memaddr - CHIP_S_MEM_W3_BUS_START(v));
438: return (1);
439: } else
440: #endif
441: return (0);
442: }
443:
444: static int
445: __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp)
446: void *v;
447: bus_space_handle_t memh;
448: bus_addr_t *memaddrp;
449: {
450:
451: memh = ALPHA_K0SEG_TO_PHYS(memh << 5) >> 5;
452:
453: #ifdef CHIP_S_MEM_W1_BUS_START
454: if ((memh << 5) >= CHIP_S_MEM_W1_SYS_START(v) &&
455: (memh << 5) <= CHIP_S_MEM_W1_SYS_END(v)) {
456: *memaddrp = CHIP_S_MEM_W1_BUS_START(v) +
457: (memh - (CHIP_S_MEM_W1_SYS_START(v) >> 5));
458: return (1);
459: } else
460: #endif
461: #ifdef CHIP_S_MEM_W2_BUS_START
462: if ((memh << 5) >= CHIP_S_MEM_W2_SYS_START(v) &&
463: (memh << 5) <= CHIP_S_MEM_W2_SYS_END(v)) {
464: *memaddrp = CHIP_S_MEM_W2_BUS_START(v) +
465: (memh - (CHIP_S_MEM_W2_SYS_START(v) >> 5));
466: return (1);
467: } else
468: #endif
469: #ifdef CHIP_S_MEM_W3_BUS_START
470: if ((memh << 5) >= CHIP_S_MEM_W3_SYS_START(v) &&
471: (memh << 5) <= CHIP_S_MEM_W3_SYS_END(v)) {
472: *memaddrp = CHIP_S_MEM_W3_BUS_START(v) +
473: (memh - (CHIP_S_MEM_W3_SYS_START(v) >> 5));
474: return (1);
475: } else
476: #endif
477: return (0);
478: }
479:
480: int
481: __C(CHIP,_mem_map)(v, memaddr, memsize, cacheable, memhp)
482: void *v;
483: bus_addr_t memaddr;
484: bus_size_t memsize;
485: int cacheable;
486: bus_space_handle_t *memhp;
487: {
488: bus_space_handle_t dh = 0, sh = 0; /* XXX -Wuninitialized */
489: int didd, dids, errord, errors, mustd, musts;
490:
491: mustd = 1;
492: musts = (cacheable == 0);
493:
494: #ifdef EXTENT_DEBUG
495: printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
496: memaddr + memsize - 1);
497: printf("mem: %s dense, %s sparse\n", mustd ? "need" : "want",
498: musts ? "need" : "want");
499: #endif
500: errord = extent_alloc_region(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
501: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
502: didd = (errord == 0);
503: errors = extent_alloc_region(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
504: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
505: dids = (errors == 0);
506:
507: #ifdef EXTENT_DEBUG
508: if (!didd)
509: printf("mem: failed to get dense (%d)\n", errord);
510: if (!dids)
511: printf("mem: failed to get sparse (%d)\n", errors);
512: #endif
513:
514: if ((mustd && !didd) || (musts && !dids))
515: goto bad;
516:
517: if (didd && !__C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr, &dh)) {
518: printf("\n");
519: #ifdef CHIP_D_MEM_W1_BUS_START
520: printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
521: CHIP_D_MEM_W1_BUS_START(v), CHIP_D_MEM_W1_BUS_END(v));
522: #endif
523: panic("%s: don't know how to map %lx cacheable",
524: __S(__C(CHIP,_mem_map)), memaddr);
525: }
526:
527: if (dids && !__C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, &sh)) {
528: printf("\n");
529: #ifdef CHIP_S_MEM_W1_BUS_START
530: printf("%s: window[1]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
531: CHIP_S_MEM_W1_BUS_START(v), CHIP_S_MEM_W1_BUS_END(v));
532: #endif
533: #ifdef CHIP_S_MEM_W2_BUS_START
534: printf("%s: window[2]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
535: CHIP_S_MEM_W2_BUS_START(v), CHIP_S_MEM_W2_BUS_END(v));
536: #endif
537: #ifdef CHIP_S_MEM_W3_BUS_START
538: printf("%s: window[3]=0x%lx-0x%lx\n", __S(__C(CHIP,_mem_map)),
539: CHIP_S_MEM_W3_BUS_START(v), CHIP_S_MEM_W3_BUS_END(v));
540: #endif
541: panic("%s: don't know how to map %lx non-cacheable",
542: __S(__C(CHIP,_mem_map)), memaddr);
543: }
544:
545: if (cacheable)
546: *memhp = dh;
547: else
548: *memhp = sh;
549: return (0);
550:
551: bad:
552: #ifdef EXTENT_DEBUG
553: printf("mem: failed\n");
554: #endif
555: if (didd) {
556: #ifdef EXTENT_DEBUG
557: printf("mem: freeing dense\n");
558: #endif
559: if (extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
560: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
561: printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n",
562: __S(__C(CHIP,_mem_map)), memaddr,
563: memaddr + memsize - 1);
564: }
565: }
566: if (dids) {
567: #ifdef EXTENT_DEBUG
568: printf("mem: freeing sparse\n");
569: #endif
570: if (extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
571: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
572: printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n",
573: __S(__C(CHIP,_mem_map)), memaddr,
574: memaddr + memsize - 1);
575: }
576: }
577:
578: #ifdef EXTENT_DEBUG
579: extent_print(CHIP_D_MEM_EXTENT(v));
580: extent_print(CHIP_S_MEM_EXTENT(v));
581: #endif
582:
583: /*
584: * return dense error if we needed it but couldn't get it, else
585: * sparse error. The error _has_ to be one of the two...
586: */
587: return (mustd && !didd ? errord : (musts && !dids ? errors : EINVAL));
588: }
589:
590: void
591: __C(CHIP,_mem_unmap)(v, memh, memsize)
592: void *v;
593: bus_space_handle_t memh;
594: bus_size_t memsize;
595: {
596: bus_addr_t memaddr;
597: bus_space_handle_t temph;
598: int sparse, haves, haved;
599:
600: #ifdef EXTENT_DEBUG
601: printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
602: #endif
603:
604: /*
605: * Find out what space we're in.
606: */
607: sparse = ((memh >> 63) == 0);
608:
609: /*
610: * Find out what address we're in in that space.
611: */
612: haves = haved = 0;
613: if (sparse)
614: haves = __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh,
615: &memaddr);
616: else
617: haved = __C(CHIP,_xlate_dense_handle_to_addr)(v, memh,
618: &memaddr);
619:
620: if (!haves && !haved)
621: panic("%s: couldn't get addr from %s handle 0x%lx",
622: __S(__C(CHIP,_mem_unmap)), sparse ? "sparse" : "dense",
623: memh);
624:
625: /*
626: * Find out were/if that address lives in the other space.
627: */
628: if (sparse)
629: haved = __C(CHIP,_xlate_addr_to_dense_handle)(v, memaddr,
630: &temph);
631: else
632: haves = __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr,
633: &temph);
634:
635: /*
636: * Free any ranges we have.
637: */
638: #ifdef EXTENT_DEBUG
639: printf("mem: it's at 0x%lx (%sdense, %ssparse)\n", memaddr,
640: haved ? "" : "not ", haves ? "" : "not ");
641: #endif
642: if (haved && extent_free(CHIP_D_MEM_EXTENT(v), memaddr, memsize,
643: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
644: printf("%s: WARNING: couldn't free dense 0x%lx-0x%lx\n",
645: __S(__C(CHIP,_mem_map)), memaddr,
646: memaddr + memsize - 1);
647: }
648: if (haves && extent_free(CHIP_S_MEM_EXTENT(v), memaddr, memsize,
649: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0)) != 0) {
650: printf("%s: WARNING: couldn't free sparse 0x%lx-0x%lx\n",
651: __S(__C(CHIP,_mem_map)), memaddr,
652: memaddr + memsize - 1);
653: }
654: }
655:
656: int
657: __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
658: void *v;
659: bus_space_handle_t memh, *nmemh;
660: bus_size_t offset, size;
661: {
662:
663: *nmemh = memh + offset;
664: return (0);
665: }
666:
667: int
668: __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, cacheable,
669: addrp, bshp)
670: void *v;
671: bus_addr_t rstart, rend, *addrp;
672: bus_size_t size, align, boundary;
673: int cacheable;
674: bus_space_handle_t *bshp;
675: {
676:
677: /* XXX XXX XXX XXX XXX XXX */
678: panic("%s not implemented", __S(__C(CHIP,_mem_alloc)));
679: }
680:
681: void
682: __C(CHIP,_mem_free)(v, bsh, size)
683: void *v;
684: bus_space_handle_t bsh;
685: bus_size_t size;
686: {
687:
688: /* XXX XXX XXX XXX XXX XXX */
689: panic("%s not implemented", __S(__C(CHIP,_mem_free)));
690: }
691:
692: inline void
693: __C(CHIP,_mem_barrier)(v, h, o, l, f)
694: void *v;
695: bus_space_handle_t h;
696: bus_size_t o, l;
697: int f;
698: {
699:
700: if ((f & BUS_BARRIER_READ) != 0)
701: alpha_mb();
702: else if ((f & BUS_BARRIER_WRITE) != 0)
703: alpha_wmb();
704: }
705:
706: inline u_int8_t
707: __C(CHIP,_mem_read_1)(v, memh, off)
708: void *v;
709: bus_space_handle_t memh;
710: bus_size_t off;
711: {
712: register bus_space_handle_t tmpmemh;
713: register u_int32_t *port, val;
714: register u_int8_t rval;
715: register int offset;
716:
717: alpha_mb();
718:
719: if ((memh >> 63) != 0)
720: return (*(u_int8_t *)(memh + off));
721:
722: tmpmemh = memh + off;
723: offset = tmpmemh & 3;
724: port = (u_int32_t *)((tmpmemh << 5) | (0 << 3));
725: val = *port;
726: rval = ((val) >> (8 * offset)) & 0xff;
727:
728: return rval;
729: }
730:
731: inline u_int16_t
732: __C(CHIP,_mem_read_2)(v, memh, off)
733: void *v;
734: bus_space_handle_t memh;
735: bus_size_t off;
736: {
737: register bus_space_handle_t tmpmemh;
738: register u_int32_t *port, val;
739: register u_int16_t rval;
740: register int offset;
741:
742: alpha_mb();
743:
744: if ((memh >> 63) != 0)
745: return (*(u_int16_t *)(memh + off));
746:
747: tmpmemh = memh + off;
748: offset = tmpmemh & 3;
749: port = (u_int32_t *)((tmpmemh << 5) | (1 << 3));
750: val = *port;
751: rval = ((val) >> (8 * offset)) & 0xffff;
752:
753: return rval;
754: }
755:
756: inline u_int32_t
757: __C(CHIP,_mem_read_4)(v, memh, off)
758: void *v;
759: bus_space_handle_t memh;
760: bus_size_t off;
761: {
762: register bus_space_handle_t tmpmemh;
763: register u_int32_t *port, val;
764: register u_int32_t rval;
765: register int offset;
766:
767: alpha_mb();
768:
769: if ((memh >> 63) != 0)
770: return (*(u_int32_t *)(memh + off));
771:
772: tmpmemh = memh + off;
773: offset = tmpmemh & 3;
774: port = (u_int32_t *)((tmpmemh << 5) | (3 << 3));
775: val = *port;
776: #if 0
777: rval = ((val) >> (8 * offset)) & 0xffffffff;
778: #else
779: rval = val;
780: #endif
781:
782: return rval;
783: }
784:
785: inline u_int64_t
786: __C(CHIP,_mem_read_8)(v, memh, off)
787: void *v;
788: bus_space_handle_t memh;
789: bus_size_t off;
790: {
791:
792: alpha_mb();
793:
794: if ((memh >> 63) != 0)
795: return (*(u_int64_t *)(memh + off));
796:
797: /* XXX XXX XXX */
798: panic("%s not implemented", __S(__C(CHIP,_mem_read_8)));
799: }
800:
801: #define CHIP_mem_read_multi_N(BYTES,TYPE) \
802: void \
803: __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \
804: void *v; \
805: bus_space_handle_t h; \
806: bus_size_t o, c; \
807: TYPE *a; \
808: { \
809: \
810: while (c-- > 0) { \
811: __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
812: BUS_BARRIER_READ); \
813: *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
814: } \
815: }
816: CHIP_mem_read_multi_N(1,u_int8_t)
817: CHIP_mem_read_multi_N(2,u_int16_t)
818: CHIP_mem_read_multi_N(4,u_int32_t)
819: CHIP_mem_read_multi_N(8,u_int64_t)
820:
821: #define CHIP_mem_read_region_N(BYTES,TYPE) \
822: void \
823: __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \
824: void *v; \
825: bus_space_handle_t h; \
826: bus_size_t o, c; \
827: TYPE *a; \
828: { \
829: \
830: while (c-- > 0) { \
831: *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
832: o += sizeof *a; \
833: } \
834: }
835: CHIP_mem_read_region_N(1,u_int8_t)
836: CHIP_mem_read_region_N(2,u_int16_t)
837: CHIP_mem_read_region_N(4,u_int32_t)
838: CHIP_mem_read_region_N(8,u_int64_t)
839:
840: inline void
841: __C(CHIP,_mem_write_1)(v, memh, off, val)
842: void *v;
843: bus_space_handle_t memh;
844: bus_size_t off;
845: u_int8_t val;
846: {
847: register bus_space_handle_t tmpmemh;
848: register u_int32_t *port, nval;
849: register int offset;
850:
851: if ((memh >> 63) != 0)
852: (*(u_int8_t *)(memh + off)) = val;
853: else {
854: tmpmemh = memh + off;
855: offset = tmpmemh & 3;
856: nval = val << (8 * offset);
857: port = (u_int32_t *)((tmpmemh << 5) | (0 << 3));
858: *port = nval;
859: }
860: alpha_mb();
861: }
862:
863: inline void
864: __C(CHIP,_mem_write_2)(v, memh, off, val)
865: void *v;
866: bus_space_handle_t memh;
867: bus_size_t off;
868: u_int16_t val;
869: {
870: register bus_space_handle_t tmpmemh;
871: register u_int32_t *port, nval;
872: register int offset;
873:
874: if ((memh >> 63) != 0)
875: (*(u_int16_t *)(memh + off)) = val;
876: else {
877: tmpmemh = memh + off;
878: offset = tmpmemh & 3;
879: nval = val << (8 * offset);
880: port = (u_int32_t *)((tmpmemh << 5) | (1 << 3));
881: *port = nval;
882: }
883: alpha_mb();
884: }
885:
886: inline void
887: __C(CHIP,_mem_write_4)(v, memh, off, val)
888: void *v;
889: bus_space_handle_t memh;
890: bus_size_t off;
891: u_int32_t val;
892: {
893: register bus_space_handle_t tmpmemh;
894: register u_int32_t *port, nval;
895: register int offset;
896:
897: if ((memh >> 63) != 0)
898: (*(u_int32_t *)(memh + off)) = val;
899: else {
900: tmpmemh = memh + off;
901: offset = tmpmemh & 3;
902: nval = val /*<< (8 * offset)*/;
903: port = (u_int32_t *)((tmpmemh << 5) | (3 << 3));
904: *port = nval;
905: }
906: alpha_mb();
907: }
908:
909: inline void
910: __C(CHIP,_mem_write_8)(v, memh, off, val)
911: void *v;
912: bus_space_handle_t memh;
913: bus_size_t off;
914: u_int64_t val;
915: {
916:
917: if ((memh >> 63) != 0)
918: (*(u_int64_t *)(memh + off)) = val;
919: else {
920: /* XXX XXX XXX */
921: panic("%s not implemented",
922: __S(__C(CHIP,_mem_write_8)));
923: }
924: alpha_mb();
925: }
926:
927: #define CHIP_mem_write_multi_N(BYTES,TYPE) \
928: void \
929: __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \
930: void *v; \
931: bus_space_handle_t h; \
932: bus_size_t o, c; \
933: const TYPE *a; \
934: { \
935: \
936: while (c-- > 0) { \
937: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
938: __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
939: BUS_BARRIER_WRITE); \
940: } \
941: }
942: CHIP_mem_write_multi_N(1,u_int8_t)
943: CHIP_mem_write_multi_N(2,u_int16_t)
944: CHIP_mem_write_multi_N(4,u_int32_t)
945: CHIP_mem_write_multi_N(8,u_int64_t)
946:
947: #define CHIP_mem_write_region_N(BYTES,TYPE) \
948: void \
949: __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \
950: void *v; \
951: bus_space_handle_t h; \
952: bus_size_t o, c; \
953: const TYPE *a; \
954: { \
955: \
956: while (c-- > 0) { \
957: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
958: o += sizeof *a; \
959: } \
960: }
961: CHIP_mem_write_region_N(1,u_int8_t)
962: CHIP_mem_write_region_N(2,u_int16_t)
963: CHIP_mem_write_region_N(4,u_int32_t)
964: CHIP_mem_write_region_N(8,u_int64_t)
965:
966: #define CHIP_mem_set_multi_N(BYTES,TYPE) \
967: void \
968: __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \
969: void *v; \
970: bus_space_handle_t h; \
971: bus_size_t o, c; \
972: TYPE val; \
973: { \
974: \
975: while (c-- > 0) { \
976: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
977: __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \
978: BUS_BARRIER_WRITE); \
979: } \
980: }
981: CHIP_mem_set_multi_N(1,u_int8_t)
982: CHIP_mem_set_multi_N(2,u_int16_t)
983: CHIP_mem_set_multi_N(4,u_int32_t)
984: CHIP_mem_set_multi_N(8,u_int64_t)
985:
986: #define CHIP_mem_set_region_N(BYTES,TYPE) \
987: void \
988: __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \
989: void *v; \
990: bus_space_handle_t h; \
991: bus_size_t o, c; \
992: TYPE val; \
993: { \
994: \
995: while (c-- > 0) { \
996: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
997: o += sizeof val; \
998: } \
999: }
1000: CHIP_mem_set_region_N(1,u_int8_t)
1001: CHIP_mem_set_region_N(2,u_int16_t)
1002: CHIP_mem_set_region_N(4,u_int32_t)
1003: CHIP_mem_set_region_N(8,u_int64_t)
1004:
1005: #define CHIP_mem_copy_N(BYTES) \
1006: void \
1007: __C(__C(CHIP,_mem_copy_),BYTES)(v, h1, o1, h2, o2, c) \
1008: void *v; \
1009: bus_space_handle_t h1, h2; \
1010: bus_size_t o1, o2, c; \
1011: { \
1012: bus_size_t i, o; \
1013: \
1014: if ((h1 >> 63) != 0 && (h2 >> 63) != 0) { \
1015: bcopy((void *)(h1 + o1), (void *)(h2 + o2), c * BYTES); \
1016: return; \
1017: } \
1018: \
1019: /* Circumvent a common case of overlapping problems */ \
1020: if (h1 == h2 && o2 > o1) \
1021: for (i = 0, o = (c - 1) * BYTES; i < c; i++, o -= BYTES)\
1022: __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
1023: __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\
1024: else \
1025: for (i = 0, o = 0; i < c; i++, o += BYTES) \
1026: __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
1027: __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\
1028: }
1029: CHIP_mem_copy_N(1)
1030: CHIP_mem_copy_N(2)
1031: CHIP_mem_copy_N(4)
1032: CHIP_mem_copy_N(8)
1033:
1034: #define CHIP_mem_read_raw_multi_N(BYTES,TYPE) \
1035: void \
1036: __C(__C(CHIP,_mem_read_raw_multi_),BYTES)(v, h, o, a, c) \
1037: void *v; \
1038: bus_space_handle_t h; \
1039: bus_size_t o, c; \
1040: u_int8_t *a; \
1041: { \
1042: TYPE temp; \
1043: int i; \
1044: \
1045: while (c > 0) { \
1046: __C(CHIP,_mem_barrier)(v, h, o, BYTES, BUS_BARRIER_READ); \
1047: temp = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
1048: i = MIN(c, BYTES); \
1049: c -= i; \
1050: while (i--) { \
1051: *a++ = temp & 0xff; \
1052: temp >>= 8; \
1053: } \
1054: } \
1055: }
1056: CHIP_mem_read_raw_multi_N(2,u_int16_t)
1057: CHIP_mem_read_raw_multi_N(4,u_int32_t)
1058: CHIP_mem_read_raw_multi_N(8,u_int64_t)
1059:
1060: #define CHIP_mem_write_raw_multi_N(BYTES,TYPE) \
1061: void \
1062: __C(__C(CHIP,_mem_write_raw_multi_),BYTES)(v, h, o, a, c) \
1063: void *v; \
1064: bus_space_handle_t h; \
1065: bus_size_t o, c; \
1066: const u_int8_t *a; \
1067: { \
1068: TYPE temp; \
1069: int i; \
1070: \
1071: while (c > 0) { \
1072: temp = 0; \
1073: for (i = BYTES - 1; i >= 0; i--) { \
1074: temp <<= 8; \
1075: if (i < c) \
1076: temp |= *(a + i); \
1077: } \
1078: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, temp); \
1079: __C(CHIP,_mem_barrier)(v, h, o, BYTES, BUS_BARRIER_WRITE); \
1080: i = MIN(c, BYTES); \
1081: c -= i; \
1082: a += i; \
1083: } \
1084: }
1085: CHIP_mem_write_raw_multi_N(2,u_int16_t)
1086: CHIP_mem_write_raw_multi_N(4,u_int32_t)
1087: CHIP_mem_write_raw_multi_N(8,u_int64_t)