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1.1 nbrk 1: /* $OpenBSD: pci_bwx_bus_mem_chipdep.c,v 1.6 2003/09/02 17:25:21 miod Exp $ */
2: /* $NetBSD: pcs_bus_mem_common.c,v 1.15 1996/12/02 22:19:36 cgd Exp $ */
3:
4: /*
5: * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6: * All rights reserved.
7: *
8: * Author: Chris G. Demetriou
9: *
10: * Permission to use, copy, modify and distribute this software and
11: * its documentation is hereby granted, provided that both the copyright
12: * notice and this permission notice appear in all copies of the
13: * software, derivative works or modified versions, and any portions
14: * thereof, and that both notices appear in supporting documentation.
15: *
16: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19: *
20: * Carnegie Mellon requests users of this software to return to
21: *
22: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23: * School of Computer Science
24: * Carnegie Mellon University
25: * Pittsburgh PA 15213-3890
26: *
27: * any improvements or extensions that they make and grant Carnegie the
28: * rights to redistribute these changes.
29: */
30:
31: /*
32: * Common PCI Chipset "bus I/O" functions, for chipsets which have to
33: * deal with only a single PCI interface chip in a machine.
34: *
35: * uses:
36: * CHIP name of the 'chip' it's being compiled for.
37: * CHIP_MEM_BASE Mem space base to use.
38: * CHIP_MEM_EX_STORE
39: * If defined, device-provided static storage area
40: * for the memory space extent. If this is
41: * defined, CHIP_MEM_EX_STORE_SIZE must also be
42: * defined. If this is not defined, a static area
43: * will be declared.
44: * CHIP_MEM_EX_STORE_SIZE
45: * Size of the device-provided static storage area
46: * for the memory space extent.
47: */
48:
49: #include <sys/extent.h>
50: #include <machine/bwx.h>
51:
52: #define __C(A,B) __CONCAT(A,B)
53: #define __S(S) __STRING(S)
54:
55: #ifndef CHIP_EXTENT_NAME
56: #define CHIP_EXTENT_NAME(v) __S(__C(CHIP,_bus_dmem))
57: #endif
58:
59: #ifndef CHIP_EXTENT_STORAGE
60: #define CHIP_EXTENT_STORAGE(v) __C(CHIP,_mem_ex_storage)
61: static long
62: __C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
63: #endif
64:
65: /* mapping/unmapping */
66: int __C(CHIP,_mem_map)(void *, bus_addr_t, bus_size_t, int,
67: bus_space_handle_t *);
68: void __C(CHIP,_mem_unmap)(void *, bus_space_handle_t,
69: bus_size_t);
70: int __C(CHIP,_mem_subregion)(void *, bus_space_handle_t,
71: bus_size_t, bus_size_t, bus_space_handle_t *);
72:
73: /* allocation/deallocation */
74: int __C(CHIP,_mem_alloc)(void *, bus_addr_t, bus_addr_t,
75: bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *,
76: bus_space_handle_t *);
77: void __C(CHIP,_mem_free)(void *, bus_space_handle_t,
78: bus_size_t);
79:
80: /* barrier */
81: inline void __C(CHIP,_mem_barrier)(void *, bus_space_handle_t,
82: bus_size_t, bus_size_t, int);
83:
84: /* read (single) */
85: inline u_int8_t __C(CHIP,_mem_read_1)(void *, bus_space_handle_t,
86: bus_size_t);
87: inline u_int16_t __C(CHIP,_mem_read_2)(void *, bus_space_handle_t,
88: bus_size_t);
89: inline u_int32_t __C(CHIP,_mem_read_4)(void *, bus_space_handle_t,
90: bus_size_t);
91: inline u_int64_t __C(CHIP,_mem_read_8)(void *, bus_space_handle_t,
92: bus_size_t);
93:
94: /* read multiple */
95: void __C(CHIP,_mem_read_multi_1)(void *, bus_space_handle_t,
96: bus_size_t, u_int8_t *, bus_size_t);
97: void __C(CHIP,_mem_read_multi_2)(void *, bus_space_handle_t,
98: bus_size_t, u_int16_t *, bus_size_t);
99: void __C(CHIP,_mem_read_multi_4)(void *, bus_space_handle_t,
100: bus_size_t, u_int32_t *, bus_size_t);
101: void __C(CHIP,_mem_read_multi_8)(void *, bus_space_handle_t,
102: bus_size_t, u_int64_t *, bus_size_t);
103:
104: /* read region */
105: void __C(CHIP,_mem_read_region_1)(void *, bus_space_handle_t,
106: bus_size_t, u_int8_t *, bus_size_t);
107: void __C(CHIP,_mem_read_region_2)(void *, bus_space_handle_t,
108: bus_size_t, u_int16_t *, bus_size_t);
109: void __C(CHIP,_mem_read_region_4)(void *, bus_space_handle_t,
110: bus_size_t, u_int32_t *, bus_size_t);
111: void __C(CHIP,_mem_read_region_8)(void *, bus_space_handle_t,
112: bus_size_t, u_int64_t *, bus_size_t);
113:
114: /* write (single) */
115: inline void __C(CHIP,_mem_write_1)(void *, bus_space_handle_t,
116: bus_size_t, u_int8_t);
117: inline void __C(CHIP,_mem_write_2)(void *, bus_space_handle_t,
118: bus_size_t, u_int16_t);
119: inline void __C(CHIP,_mem_write_4)(void *, bus_space_handle_t,
120: bus_size_t, u_int32_t);
121: inline void __C(CHIP,_mem_write_8)(void *, bus_space_handle_t,
122: bus_size_t, u_int64_t);
123:
124: /* write multiple */
125: void __C(CHIP,_mem_write_multi_1)(void *, bus_space_handle_t,
126: bus_size_t, const u_int8_t *, bus_size_t);
127: void __C(CHIP,_mem_write_multi_2)(void *, bus_space_handle_t,
128: bus_size_t, const u_int16_t *, bus_size_t);
129: void __C(CHIP,_mem_write_multi_4)(void *, bus_space_handle_t,
130: bus_size_t, const u_int32_t *, bus_size_t);
131: void __C(CHIP,_mem_write_multi_8)(void *, bus_space_handle_t,
132: bus_size_t, const u_int64_t *, bus_size_t);
133:
134: /* write region */
135: void __C(CHIP,_mem_write_region_1)(void *, bus_space_handle_t,
136: bus_size_t, const u_int8_t *, bus_size_t);
137: void __C(CHIP,_mem_write_region_2)(void *, bus_space_handle_t,
138: bus_size_t, const u_int16_t *, bus_size_t);
139: void __C(CHIP,_mem_write_region_4)(void *, bus_space_handle_t,
140: bus_size_t, const u_int32_t *, bus_size_t);
141: void __C(CHIP,_mem_write_region_8)(void *, bus_space_handle_t,
142: bus_size_t, const u_int64_t *, bus_size_t);
143:
144: /* set multiple */
145: void __C(CHIP,_mem_set_multi_1)(void *, bus_space_handle_t,
146: bus_size_t, u_int8_t, bus_size_t);
147: void __C(CHIP,_mem_set_multi_2)(void *, bus_space_handle_t,
148: bus_size_t, u_int16_t, bus_size_t);
149: void __C(CHIP,_mem_set_multi_4)(void *, bus_space_handle_t,
150: bus_size_t, u_int32_t, bus_size_t);
151: void __C(CHIP,_mem_set_multi_8)(void *, bus_space_handle_t,
152: bus_size_t, u_int64_t, bus_size_t);
153:
154: /* set region */
155: void __C(CHIP,_mem_set_region_1)(void *, bus_space_handle_t,
156: bus_size_t, u_int8_t, bus_size_t);
157: void __C(CHIP,_mem_set_region_2)(void *, bus_space_handle_t,
158: bus_size_t, u_int16_t, bus_size_t);
159: void __C(CHIP,_mem_set_region_4)(void *, bus_space_handle_t,
160: bus_size_t, u_int32_t, bus_size_t);
161: void __C(CHIP,_mem_set_region_8)(void *, bus_space_handle_t,
162: bus_size_t, u_int64_t, bus_size_t);
163:
164: /* copy */
165: void __C(CHIP,_mem_copy_1)(void *, bus_space_handle_t,
166: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
167: void __C(CHIP,_mem_copy_2)(void *, bus_space_handle_t,
168: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
169: void __C(CHIP,_mem_copy_4)(void *, bus_space_handle_t,
170: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
171: void __C(CHIP,_mem_copy_8)(void *, bus_space_handle_t,
172: bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
173:
174: /* read multiple raw */
175: void __C(CHIP,_mem_read_raw_multi_2)(void *,
176: bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
177: void __C(CHIP,_mem_read_raw_multi_4)(void *,
178: bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
179: void __C(CHIP,_mem_read_raw_multi_8)(void *,
180: bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
181:
182: /* write multiple raw */
183: void __C(CHIP,_mem_write_raw_multi_2)(void *,
184: bus_space_handle_t, bus_size_t, const u_int8_t *,
185: bus_size_t);
186: void __C(CHIP,_mem_write_raw_multi_4)(void *,
187: bus_space_handle_t, bus_size_t, const u_int8_t *,
188: bus_size_t);
189: void __C(CHIP,_mem_write_raw_multi_8)(void *,
190: bus_space_handle_t, bus_size_t, const u_int8_t *,
191: bus_size_t);
192:
193: void
194: __C(CHIP,_bus_mem_init)(t, v)
195: bus_space_tag_t t;
196: void *v;
197: {
198: struct extent *ex;
199:
200: /*
201: * Initialize the bus space tag.
202: */
203:
204: /* cookie */
205: t->abs_cookie = v;
206:
207: /* mapping/unmapping */
208: t->abs_map = __C(CHIP,_mem_map);
209: t->abs_unmap = __C(CHIP,_mem_unmap);
210: t->abs_subregion = __C(CHIP,_mem_subregion);
211:
212: /* allocation/deallocation */
213: t->abs_alloc = __C(CHIP,_mem_alloc);
214: t->abs_free = __C(CHIP,_mem_free);
215:
216: /* barrier */
217: t->abs_barrier = __C(CHIP,_mem_barrier);
218:
219: /* read (single) */
220: t->abs_r_1 = __C(CHIP,_mem_read_1);
221: t->abs_r_2 = __C(CHIP,_mem_read_2);
222: t->abs_r_4 = __C(CHIP,_mem_read_4);
223: t->abs_r_8 = __C(CHIP,_mem_read_8);
224:
225: /* read multiple */
226: t->abs_rm_1 = __C(CHIP,_mem_read_multi_1);
227: t->abs_rm_2 = __C(CHIP,_mem_read_multi_2);
228: t->abs_rm_4 = __C(CHIP,_mem_read_multi_4);
229: t->abs_rm_8 = __C(CHIP,_mem_read_multi_8);
230:
231: /* read region */
232: t->abs_rr_1 = __C(CHIP,_mem_read_region_1);
233: t->abs_rr_2 = __C(CHIP,_mem_read_region_2);
234: t->abs_rr_4 = __C(CHIP,_mem_read_region_4);
235: t->abs_rr_8 = __C(CHIP,_mem_read_region_8);
236:
237: /* write (single) */
238: t->abs_w_1 = __C(CHIP,_mem_write_1);
239: t->abs_w_2 = __C(CHIP,_mem_write_2);
240: t->abs_w_4 = __C(CHIP,_mem_write_4);
241: t->abs_w_8 = __C(CHIP,_mem_write_8);
242:
243: /* write multiple */
244: t->abs_wm_1 = __C(CHIP,_mem_write_multi_1);
245: t->abs_wm_2 = __C(CHIP,_mem_write_multi_2);
246: t->abs_wm_4 = __C(CHIP,_mem_write_multi_4);
247: t->abs_wm_8 = __C(CHIP,_mem_write_multi_8);
248:
249: /* write region */
250: t->abs_wr_1 = __C(CHIP,_mem_write_region_1);
251: t->abs_wr_2 = __C(CHIP,_mem_write_region_2);
252: t->abs_wr_4 = __C(CHIP,_mem_write_region_4);
253: t->abs_wr_8 = __C(CHIP,_mem_write_region_8);
254:
255: /* set multiple */
256: t->abs_sm_1 = __C(CHIP,_mem_set_multi_1);
257: t->abs_sm_2 = __C(CHIP,_mem_set_multi_2);
258: t->abs_sm_4 = __C(CHIP,_mem_set_multi_4);
259: t->abs_sm_8 = __C(CHIP,_mem_set_multi_8);
260:
261: /* set region */
262: t->abs_sr_1 = __C(CHIP,_mem_set_region_1);
263: t->abs_sr_2 = __C(CHIP,_mem_set_region_2);
264: t->abs_sr_4 = __C(CHIP,_mem_set_region_4);
265: t->abs_sr_8 = __C(CHIP,_mem_set_region_8);
266:
267: /* copy */
268: t->abs_c_1 = __C(CHIP,_mem_copy_1);
269: t->abs_c_2 = __C(CHIP,_mem_copy_2);
270: t->abs_c_4 = __C(CHIP,_mem_copy_4);
271: t->abs_c_8 = __C(CHIP,_mem_copy_8);
272:
273: /* read multiple raw */
274: t->abs_rrm_2 = __C(CHIP,_mem_read_raw_multi_2);
275: t->abs_rrm_4 = __C(CHIP,_mem_read_raw_multi_4);
276: t->abs_rrm_8 = __C(CHIP,_mem_read_raw_multi_8);
277:
278: /* write multiple raw*/
279: t->abs_wrm_2 = __C(CHIP,_mem_write_raw_multi_2);
280: t->abs_wrm_4 = __C(CHIP,_mem_write_raw_multi_4);
281: t->abs_wrm_8 = __C(CHIP,_mem_write_raw_multi_8);
282:
283: ex = extent_create(CHIP_EXTENT_NAME(v), 0x0UL,
284: 0xffffffffffffffffUL, M_DEVBUF,
285: (caddr_t)CHIP_EXTENT_STORAGE(v),
286: sizeof(CHIP_EXTENT_STORAGE(v)), EX_NOWAIT|EX_NOCOALESCE);
287:
288: CHIP_MEM_EXTENT(v) = ex;
289: }
290:
291: int
292: __C(CHIP,_mem_map)(v, memaddr, memsize, cacheable, memhp)
293: void *v;
294: bus_addr_t memaddr;
295: bus_size_t memsize;
296: int cacheable;
297: bus_space_handle_t *memhp;
298: {
299: int error;
300:
301: #ifdef EXTENT_DEBUG
302: printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
303: memaddr + memsize - 1);
304: #endif
305: error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize,
306: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
307: if (error) {
308: #ifdef EXTENT_DEBUG
309: printf("mem: allocation failed (%d)\n", error);
310: extent_print(CHIP_MEM_EXTENT(v));
311: #endif
312: return (error);
313: }
314:
315: *memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr;
316:
317: return (0);
318: }
319:
320: void
321: __C(CHIP,_mem_unmap)(v, memh, memsize)
322: void *v;
323: bus_space_handle_t memh;
324: bus_size_t memsize;
325: {
326: bus_addr_t memaddr;
327: int error;
328:
329: #ifdef EXTENT_DEBUG
330: printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
331: #endif
332: memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v));
333:
334: #ifdef EXTENT_DEBUG
335: "mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1);
336: #endif
337: error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize,
338: EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
339: if (error) {
340: printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n",
341: __S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1,
342: error);
343: #ifdef EXTENT_DEBUG
344: extent_print(CHIP_MEM_EXTENT(v));
345: #endif
346: }
347: }
348:
349: int
350: __C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
351: void *v;
352: bus_space_handle_t memh, *nmemh;
353: bus_size_t offset, size;
354: {
355:
356: *nmemh = memh + offset;
357: return (0);
358: }
359:
360: int
361: __C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, cacheable,
362: addrp, bshp)
363: void *v;
364: bus_addr_t rstart, rend, *addrp;
365: bus_size_t size, align, boundary;
366: int cacheable;
367: bus_space_handle_t *bshp;
368: {
369: bus_addr_t memaddr;
370: int error;
371:
372: /*
373: * Do the requested allocation.
374: */
375: #ifdef EXTENT_DEBUG
376: printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend);
377: #endif
378: error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend,
379: size, align, 0, boundary,
380: EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0),
381: &memaddr);
382: if (error) {
383: #ifdef EXTENT_DEBUG
384: printf("mem: allocation failed (%d)\n", error);
385: extent_print(CHIP_MEM_EXTENT(v));
386: #endif
387: }
388:
389: #ifdef EXTENT_DEBUG
390: printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1);
391: #endif
392:
393: *addrp = memaddr;
394: *bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr;
395:
396: return (0);
397: }
398:
399: void
400: __C(CHIP,_mem_free)(v, bsh, size)
401: void *v;
402: bus_space_handle_t bsh;
403: bus_size_t size;
404: {
405:
406: /* Unmap does all we need to do. */
407: __C(CHIP,_mem_unmap)(v, bsh, size);
408: }
409:
410: inline void
411: __C(CHIP,_mem_barrier)(v, h, o, l, f)
412: void *v;
413: bus_space_handle_t h;
414: bus_size_t o, l;
415: int f;
416: {
417:
418: if ((f & BUS_BARRIER_READ) != 0)
419: alpha_mb();
420: else if ((f & BUS_BARRIER_WRITE) != 0)
421: alpha_wmb();
422: }
423:
424: inline u_int8_t
425: __C(CHIP,_mem_read_1)(v, memh, off)
426: void *v;
427: bus_space_handle_t memh;
428: bus_size_t off;
429: {
430: bus_addr_t addr;
431:
432: addr = memh + off;
433: alpha_mb();
434: return (alpha_ldbu((u_int8_t *)addr));
435: }
436:
437: inline u_int16_t
438: __C(CHIP,_mem_read_2)(v, memh, off)
439: void *v;
440: bus_space_handle_t memh;
441: bus_size_t off;
442: {
443: bus_addr_t addr;
444:
445: addr = memh + off;
446: #ifdef DIAGNOSTIC
447: if (addr & 1)
448: panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned",
449: addr);
450: #endif
451: alpha_mb();
452: return (alpha_ldwu((u_int16_t *)addr));
453: }
454:
455: inline u_int32_t
456: __C(CHIP,_mem_read_4)(v, memh, off)
457: void *v;
458: bus_space_handle_t memh;
459: bus_size_t off;
460: {
461: bus_addr_t addr;
462:
463: addr = memh + off;
464: #ifdef DIAGNOSTIC
465: if (addr & 3)
466: panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned",
467: addr);
468: #endif
469: alpha_mb();
470: return (*(u_int32_t *)addr);
471: }
472:
473: inline u_int64_t
474: __C(CHIP,_mem_read_8)(v, memh, off)
475: void *v;
476: bus_space_handle_t memh;
477: bus_size_t off;
478: {
479:
480: alpha_mb();
481:
482: /* XXX XXX XXX */
483: panic("%s not implemented", __S(__C(CHIP,_mem_read_8)));
484: }
485:
486: #define CHIP_mem_read_multi_N(BYTES,TYPE) \
487: void \
488: __C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \
489: void *v; \
490: bus_space_handle_t h; \
491: bus_size_t o, c; \
492: TYPE *a; \
493: { \
494: \
495: while (c-- > 0) { \
496: __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
497: BUS_BARRIER_READ); \
498: *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
499: } \
500: }
501: CHIP_mem_read_multi_N(1,u_int8_t)
502: CHIP_mem_read_multi_N(2,u_int16_t)
503: CHIP_mem_read_multi_N(4,u_int32_t)
504: CHIP_mem_read_multi_N(8,u_int64_t)
505:
506: #define CHIP_mem_read_region_N(BYTES,TYPE) \
507: void \
508: __C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \
509: void *v; \
510: bus_space_handle_t h; \
511: bus_size_t o, c; \
512: TYPE *a; \
513: { \
514: \
515: while (c-- > 0) { \
516: *a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
517: o += sizeof *a; \
518: } \
519: }
520: CHIP_mem_read_region_N(1,u_int8_t)
521: CHIP_mem_read_region_N(2,u_int16_t)
522: CHIP_mem_read_region_N(4,u_int32_t)
523: CHIP_mem_read_region_N(8,u_int64_t)
524:
525: inline void
526: __C(CHIP,_mem_write_1)(v, memh, off, val)
527: void *v;
528: bus_space_handle_t memh;
529: bus_size_t off;
530: u_int8_t val;
531: {
532: bus_addr_t addr;
533:
534: addr = memh + off;
535: alpha_stb((u_int8_t *)addr, val);
536: alpha_mb();
537: }
538:
539: inline void
540: __C(CHIP,_mem_write_2)(v, memh, off, val)
541: void *v;
542: bus_space_handle_t memh;
543: bus_size_t off;
544: u_int16_t val;
545: {
546: bus_addr_t addr;
547:
548: addr = memh + off;
549: #ifdef DIAGNOSTIC
550: if (addr & 1)
551: panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned",
552: addr);
553: #endif
554: alpha_stw((u_int16_t *)addr, val);
555: alpha_mb();
556: }
557:
558: inline void
559: __C(CHIP,_mem_write_4)(v, memh, off, val)
560: void *v;
561: bus_space_handle_t memh;
562: bus_size_t off;
563: u_int32_t val;
564: {
565: bus_addr_t addr;
566:
567: addr = memh + off;
568: #ifdef DIAGNOSTIC
569: if (addr & 3)
570: panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned",
571: addr);
572: #endif
573: *(u_int32_t *)addr = val;
574: alpha_mb();
575: }
576:
577: inline void
578: __C(CHIP,_mem_write_8)(v, memh, off, val)
579: void *v;
580: bus_space_handle_t memh;
581: bus_size_t off;
582: u_int64_t val;
583: {
584:
585: /* XXX XXX XXX */
586: panic("%s not implemented", __S(__C(CHIP,_mem_write_8)));
587: alpha_mb();
588: }
589:
590: #define CHIP_mem_write_multi_N(BYTES,TYPE) \
591: void \
592: __C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \
593: void *v; \
594: bus_space_handle_t h; \
595: bus_size_t o, c; \
596: const TYPE *a; \
597: { \
598: \
599: while (c-- > 0) { \
600: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
601: __C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
602: BUS_BARRIER_WRITE); \
603: } \
604: }
605: CHIP_mem_write_multi_N(1,u_int8_t)
606: CHIP_mem_write_multi_N(2,u_int16_t)
607: CHIP_mem_write_multi_N(4,u_int32_t)
608: CHIP_mem_write_multi_N(8,u_int64_t)
609:
610: #define CHIP_mem_write_region_N(BYTES,TYPE) \
611: void \
612: __C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \
613: void *v; \
614: bus_space_handle_t h; \
615: bus_size_t o, c; \
616: const TYPE *a; \
617: { \
618: \
619: while (c-- > 0) { \
620: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
621: o += sizeof *a; \
622: } \
623: }
624: CHIP_mem_write_region_N(1,u_int8_t)
625: CHIP_mem_write_region_N(2,u_int16_t)
626: CHIP_mem_write_region_N(4,u_int32_t)
627: CHIP_mem_write_region_N(8,u_int64_t)
628:
629: #define CHIP_mem_set_multi_N(BYTES,TYPE) \
630: void \
631: __C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \
632: void *v; \
633: bus_space_handle_t h; \
634: bus_size_t o, c; \
635: TYPE val; \
636: { \
637: \
638: while (c-- > 0) { \
639: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
640: __C(CHIP,_mem_barrier)(v, h, o, sizeof val, \
641: BUS_BARRIER_WRITE); \
642: } \
643: }
644: CHIP_mem_set_multi_N(1,u_int8_t)
645: CHIP_mem_set_multi_N(2,u_int16_t)
646: CHIP_mem_set_multi_N(4,u_int32_t)
647: CHIP_mem_set_multi_N(8,u_int64_t)
648:
649: #define CHIP_mem_set_region_N(BYTES,TYPE) \
650: void \
651: __C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \
652: void *v; \
653: bus_space_handle_t h; \
654: bus_size_t o, c; \
655: TYPE val; \
656: { \
657: \
658: while (c-- > 0) { \
659: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
660: o += sizeof val; \
661: } \
662: }
663: CHIP_mem_set_region_N(1,u_int8_t)
664: CHIP_mem_set_region_N(2,u_int16_t)
665: CHIP_mem_set_region_N(4,u_int32_t)
666: CHIP_mem_set_region_N(8,u_int64_t)
667:
668: #define CHIP_mem_copy_N(BYTES) \
669: void \
670: __C(__C(CHIP,_mem_copy_),BYTES)(v, h1, o1, h2, o2, c) \
671: void *v; \
672: bus_space_handle_t h1, h2; \
673: bus_size_t o1, o2, c; \
674: { \
675: bus_size_t i, o; \
676: \
677: if ((h1 >> 63) != 0 && (h2 >> 63) != 0) { \
678: bcopy((void *)(h1 + o1), (void *)(h2 + o2), c * BYTES); \
679: return; \
680: } \
681: \
682: /* Circumvent a common case of overlapping problems */ \
683: if (h1 == h2 && o2 > o1) \
684: for (i = 0, o = (c - 1) * BYTES; i < c; i++, o -= BYTES)\
685: __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
686: __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\
687: else \
688: for (i = 0, o = 0; i < c; i++, o += BYTES) \
689: __C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
690: __C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o));\
691: }
692: CHIP_mem_copy_N(1)
693: CHIP_mem_copy_N(2)
694: CHIP_mem_copy_N(4)
695: CHIP_mem_copy_N(8)
696:
697: #define CHIP_mem_read_raw_multi_N(BYTES,TYPE) \
698: void \
699: __C(__C(CHIP,_mem_read_raw_multi_),BYTES)(v, h, o, a, c) \
700: void *v; \
701: bus_space_handle_t h; \
702: bus_size_t o, c; \
703: u_int8_t *a; \
704: { \
705: TYPE temp; \
706: int i; \
707: \
708: while (c > 0) { \
709: __C(CHIP,_mem_barrier)(v, h, o, BYTES, BUS_BARRIER_READ); \
710: temp = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
711: i = MIN(c, BYTES); \
712: c -= i; \
713: while (i--) { \
714: *a++ = temp & 0xff; \
715: temp >>= 8; \
716: } \
717: } \
718: }
719: CHIP_mem_read_raw_multi_N(2,u_int16_t)
720: CHIP_mem_read_raw_multi_N(4,u_int32_t)
721: CHIP_mem_read_raw_multi_N(8,u_int64_t)
722:
723: #define CHIP_mem_write_raw_multi_N(BYTES,TYPE) \
724: void \
725: __C(__C(CHIP,_mem_write_raw_multi_),BYTES)(v, h, o, a, c) \
726: void *v; \
727: bus_space_handle_t h; \
728: bus_size_t o, c; \
729: const u_int8_t *a; \
730: { \
731: TYPE temp; \
732: int i; \
733: \
734: while (c > 0) { \
735: temp = 0; \
736: for (i = BYTES - 1; i >= 0; i--) { \
737: temp <<= 8; \
738: if (i < c) \
739: temp |= *(a + i); \
740: } \
741: __C(__C(CHIP,_mem_write_),BYTES)(v, h, o, temp); \
742: __C(CHIP,_mem_barrier)(v, h, o, BYTES, BUS_BARRIER_WRITE); \
743: i = MIN(c, BYTES); \
744: c -= i; \
745: a += i; \
746: } \
747: }
748: CHIP_mem_write_raw_multi_N(2,u_int16_t)
749: CHIP_mem_write_raw_multi_N(4,u_int32_t)
750: CHIP_mem_write_raw_multi_N(8,u_int64_t)