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1.1 nbrk 1: /* $OpenBSD: pci_axppci_33.c,v 1.18 2006/06/15 20:08:29 brad Exp $ */
2: /* $NetBSD: pci_axppci_33.c,v 1.10 1996/11/13 21:13:29 cgd Exp $ */
3:
4: /*
5: * Copyright (c) 1995, 1996 Carnegie-Mellon University.
6: * All rights reserved.
7: *
8: * Authors: Jeffrey Hsu and Chris G. Demetriou
9: *
10: * Permission to use, copy, modify and distribute this software and
11: * its documentation is hereby granted, provided that both the copyright
12: * notice and this permission notice appear in all copies of the
13: * software, derivative works or modified versions, and any portions
14: * thereof, and that both notices appear in supporting documentation.
15: *
16: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
17: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
18: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
19: *
20: * Carnegie Mellon requests users of this software to return to
21: *
22: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
23: * School of Computer Science
24: * Carnegie Mellon University
25: * Pittsburgh PA 15213-3890
26: *
27: * any improvements or extensions that they make and grant Carnegie the
28: * rights to redistribute these changes.
29: */
30:
31: #include <sys/types.h>
32: #include <sys/param.h>
33: #include <sys/time.h>
34: #include <sys/systm.h>
35: #include <sys/errno.h>
36: #include <sys/device.h>
37: #include <uvm/uvm_extern.h>
38:
39: #include <machine/autoconf.h>
40: #include <machine/bus.h>
41: #include <machine/intr.h>
42:
43: #include <dev/isa/isavar.h>
44: #include <dev/pci/pcireg.h>
45: #include <dev/pci/pcivar.h>
46:
47: #include <alpha/pci/lcavar.h>
48:
49: #include <alpha/pci/pci_axppci_33.h>
50: #include <alpha/pci/siovar.h>
51: #include <alpha/pci/sioreg.h>
52:
53: #include "sio.h"
54:
55: int dec_axppci_33_intr_map(void *, pcitag_t, int, int,
56: pci_intr_handle_t *);
57: const char *dec_axppci_33_intr_string(void *, pci_intr_handle_t);
58: int dec_axppci_33_intr_line(void *, pci_intr_handle_t);
59: void *dec_axppci_33_intr_establish(void *, pci_intr_handle_t,
60: int, int (*func)(void *), void *, char *);
61: void dec_axppci_33_intr_disestablish(void *, void *);
62:
63: #define LCA_SIO_DEVICE 7 /* XXX */
64:
65: void
66: pci_axppci_33_pickintr(lcp)
67: struct lca_config *lcp;
68: {
69: bus_space_tag_t iot = &lcp->lc_iot;
70: pci_chipset_tag_t pc = &lcp->lc_pc;
71: pcireg_t sioclass;
72: int sioII;
73:
74: /* XXX MAGIC NUMBER */
75: sioclass = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
76: PCI_CLASS_REG);
77: sioII = (sioclass & 0xff) >= 3;
78:
79: if (!sioII)
80: printf("WARNING: SIO NOT SIO II... NO BETS...\n");
81:
82: pc->pc_intr_v = lcp;
83: pc->pc_intr_map = dec_axppci_33_intr_map;
84: pc->pc_intr_string = dec_axppci_33_intr_string;
85: pc->pc_intr_line = dec_axppci_33_intr_line;
86: pc->pc_intr_establish = dec_axppci_33_intr_establish;
87: pc->pc_intr_disestablish = dec_axppci_33_intr_disestablish;
88:
89: /* Not supported on AXPpci33. */
90: pc->pc_pciide_compat_intr_establish = NULL;
91: pc->pc_pciide_compat_intr_disestablish = NULL;
92:
93: #if NSIO
94: sio_intr_setup(pc, iot);
95: #else
96: panic("pci_axppci_33_pickintr: no I/O interrupt handler (no sio)");
97: #endif
98: }
99:
100: int
101: dec_axppci_33_intr_map(lcv, bustag, buspin, line, ihp)
102: void *lcv;
103: pcitag_t bustag;
104: int buspin, line;
105: pci_intr_handle_t *ihp;
106: {
107: struct lca_config *lcp = lcv;
108: pci_chipset_tag_t pc = &lcp->lc_pc;
109: int device, pirq;
110: pcireg_t pirqreg;
111: u_int8_t pirqline;
112:
113: if (buspin == 0) {
114: /* No IRQ used. */
115: return 1;
116: }
117: if (buspin > 4) {
118: printf("pci_map_int: bad interrupt pin %d\n", buspin);
119: return 1;
120: }
121:
122: pci_decompose_tag(pc, bustag, NULL, &device, NULL);
123:
124: switch (device) {
125: case 6: /* NCR SCSI */
126: pirq = 3;
127: break;
128:
129: case 11: /* slot 1 */
130: switch (buspin) {
131: case PCI_INTERRUPT_PIN_A:
132: case PCI_INTERRUPT_PIN_D:
133: pirq = 0;
134: break;
135: case PCI_INTERRUPT_PIN_B:
136: pirq = 2;
137: break;
138: case PCI_INTERRUPT_PIN_C:
139: pirq = 1;
140: break;
141: #ifdef DIAGNOSTIC
142: default: /* XXX gcc -Wuninitialized */
143: panic("dec_axppci_33_intr_map bogus PCI pin %d",
144: buspin);
145: #endif
146: };
147: break;
148:
149: case 12: /* slot 2 */
150: switch (buspin) {
151: case PCI_INTERRUPT_PIN_A:
152: case PCI_INTERRUPT_PIN_D:
153: pirq = 1;
154: break;
155: case PCI_INTERRUPT_PIN_B:
156: pirq = 0;
157: break;
158: case PCI_INTERRUPT_PIN_C:
159: pirq = 2;
160: break;
161: #ifdef DIAGNOSTIC
162: default: /* XXX gcc -Wuninitialized */
163: panic("dec_axppci_33_intr_map bogus PCI pin %d",
164: buspin);
165: #endif
166: };
167: break;
168:
169: case 8: /* slot 3 */
170: switch (buspin) {
171: case PCI_INTERRUPT_PIN_A:
172: case PCI_INTERRUPT_PIN_D:
173: pirq = 2;
174: break;
175: case PCI_INTERRUPT_PIN_B:
176: pirq = 1;
177: break;
178: case PCI_INTERRUPT_PIN_C:
179: pirq = 0;
180: break;
181: #ifdef DIAGNOSTIC
182: default: /* XXX gcc -Wuninitialized */
183: panic("dec_axppci_33_intr_map bogus PCI pin %d",
184: buspin);
185: #endif
186: };
187: break;
188:
189: default:
190: printf("dec_axppci_33_intr_map: weird device number %d\n",
191: device);
192: return 1;
193: }
194:
195: pirqreg = pci_conf_read(pc, pci_make_tag(pc, 0, LCA_SIO_DEVICE, 0),
196: SIO_PCIREG_PIRQ_RTCTRL);
197: #if 0
198: printf("pci_axppci_33_map_int: device %d pin %c: pirq %d, reg = %x\n",
199: device, '@' + buspin, pirq, pirqreg);
200: #endif
201: pirqline = (pirqreg >> (pirq * 8)) & 0xff;
202: if ((pirqline & 0x80) != 0)
203: return 1; /* not routed? */
204: pirqline &= 0xf;
205:
206: #if 0
207: printf("pci_axppci_33_map_int: device %d pin %c: mapped to line %d\n",
208: device, '@' + buspin, pirqline);
209: #endif
210:
211: *ihp = pirqline;
212: return (0);
213: }
214:
215: const char *
216: dec_axppci_33_intr_string(lcv, ih)
217: void *lcv;
218: pci_intr_handle_t ih;
219: {
220: return sio_intr_string(NULL /*XXX*/, ih);
221: }
222:
223: int
224: dec_axppci_33_intr_line(lcv, ih)
225: void *lcv;
226: pci_intr_handle_t ih;
227: {
228: return sio_intr_line(NULL /*XXX*/, ih);
229: }
230:
231: void *
232: dec_axppci_33_intr_establish(lcv, ih, level, func, arg, name)
233: void *lcv, *arg;
234: pci_intr_handle_t ih;
235: int level;
236: int (*func)(void *);
237: char *name;
238: {
239: return sio_intr_establish(NULL /*XXX*/, ih, IST_LEVEL, level, func,
240: arg, name);
241: }
242:
243: void
244: dec_axppci_33_intr_disestablish(lcv, cookie)
245: void *lcv, *cookie;
246: {
247: sio_intr_disestablish(NULL /*XXX*/, cookie);
248: }