Annotation of sys/arch/alpha/pci/lca.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: lca.c,v 1.19 2006/12/14 17:36:12 kettenis Exp $ */
2: /* $NetBSD: lca.c,v 1.14 1996/12/05 01:39:35 cgd Exp $ */
3:
4: /*-
5: * Copyright (c) 2000 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: /*
41: * Copyright (c) 1995, 1996 Carnegie-Mellon University.
42: * All rights reserved.
43: *
44: * Authors: Jeffrey Hsu and Chris G. Demetriou
45: *
46: * Permission to use, copy, modify and distribute this software and
47: * its documentation is hereby granted, provided that both the copyright
48: * notice and this permission notice appear in all copies of the
49: * software, derivative works or modified versions, and any portions
50: * thereof, and that both notices appear in supporting documentation.
51: *
52: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55: *
56: * Carnegie Mellon requests users of this software to return to
57: *
58: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
59: * School of Computer Science
60: * Carnegie Mellon University
61: * Pittsburgh PA 15213-3890
62: *
63: * any improvements or extensions that they make and grant Carnegie the
64: * rights to redistribute these changes.
65: */
66:
67: #include <sys/param.h>
68: #include <sys/systm.h>
69: #include <sys/kernel.h>
70: #include <sys/malloc.h>
71: #include <sys/device.h>
72:
73: #include <uvm/uvm_extern.h>
74:
75: #include <machine/autoconf.h>
76: #include <machine/rpb.h>
77:
78: #include <dev/isa/isareg.h>
79: #include <dev/isa/isavar.h>
80:
81: #include <dev/pci/pcireg.h>
82: #include <dev/pci/pcivar.h>
83: #include <alpha/pci/lcareg.h>
84: #include <alpha/pci/lcavar.h>
85: #ifdef DEC_AXPPCI_33
86: #include <alpha/pci/pci_axppci_33.h>
87: #endif
88: #ifdef DEC_ALPHABOOK1
89: #include <alpha/pci/pci_alphabook1.h>
90: #endif
91: #ifdef DEC_EB66
92: #include <alpha/pci/pci_eb66.h>
93: #endif
94:
95: int lcamatch(struct device *, void *, void *);
96: void lcaattach(struct device *, struct device *, void *);
97:
98: struct cfattach lca_ca = {
99: sizeof(struct device), lcamatch, lcaattach,
100: };
101:
102: struct cfdriver lca_cd = {
103: NULL, "lca", DV_DULL,
104: };
105:
106: int lcaprint(void *, const char *pnp);
107:
108: #if 0
109: int lca_bus_get_window(int, int,
110: struct alpha_bus_space_translation *);
111: #endif
112:
113: /* There can be only one. */
114: int lcafound;
115: struct lca_config lca_configuration;
116:
117: int
118: lcamatch(parent, match, aux)
119: struct device *parent;
120: void *match;
121: void *aux;
122: {
123: struct mainbus_attach_args *ma = aux;
124:
125: /* Make sure that we're looking for a LCA. */
126: if (strcmp(ma->ma_name, lca_cd.cd_name) != 0)
127: return (0);
128:
129: if (lcafound)
130: return (0);
131:
132: return (1);
133: }
134:
135: /*
136: * Set up the chipset's function pointers.
137: */
138: void
139: lca_init(lcp, mallocsafe)
140: struct lca_config *lcp;
141: int mallocsafe;
142: {
143:
144: /*
145: * The LCA HAE register is WRITE-ONLY, so we can't tell where
146: * the second sparse window is actually mapped. Therefore,
147: * we have to guess where it is. This seems to be the normal
148: * address.
149: */
150: lcp->lc_s_mem_w2_masked_base = 0x80000000;
151:
152: if (!lcp->lc_initted) {
153: /* don't do these twice since they set up extents */
154: lca_bus_io_init(&lcp->lc_iot, lcp);
155: lca_bus_mem_init(&lcp->lc_memt, lcp);
156:
157: #if 0
158: /*
159: * We have 1 I/O window and 3 MEM windows.
160: */
161: alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
162: alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
163: alpha_bus_get_window = lca_bus_get_window;
164: #endif
165: }
166: lcp->lc_mallocsafe = mallocsafe;
167:
168: lca_pci_init(&lcp->lc_pc, lcp);
169: alpha_pci_chipset = &lcp->lc_pc;
170: alpha_pci_chipset->pc_name = "lca";
171: alpha_pci_chipset->pc_mem = LCA_PCI_SPARSE;
172: alpha_pci_chipset->pc_ports = LCA_PCI_SIO;
173: alpha_pci_chipset->pc_hae_mask = IOC_HAE_ADDREXT;
174: alpha_pci_chipset->pc_dense = LCA_PCI_DENSE;
175: alpha_pci_chipset->pc_bwx = 0;
176:
177: /*
178: * Refer to ``DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors
179: * Hardware Reference Manual''.
180: * ...
181: */
182:
183: /*
184: * According to section 6.4.1, all bits of the IOC_HAE register are
185: * undefined after reset. Bits <31:27> are write-only. However, we
186: * cannot blindly set it to zero. The serial ROM code that initializes
187: * the PCI devices' address spaces, allocates sparse memory blocks in
188: * the range that must use the IOC_HAE register for address translation,
189: * and sets this register accordingly (see section 6.4.14).
190: *
191: * IOC_HAE left AS IS.
192: */
193:
194: /* According to section 6.4.2, all bits of the IOC_CONF register are
195: * undefined after reset. Bits <1:0> are write-only. Set them to
196: * 0x00 for PCI Type 0 configuration access.
197: *
198: * IOC_CONF set to ZERO.
199: */
200: REGVAL64(LCA_IOC_CONF) = 0;
201:
202: lcp->lc_initted = 1;
203: }
204:
205: void
206: lcaattach(parent, self, aux)
207: struct device *parent, *self;
208: void *aux;
209: {
210: struct lca_config *lcp;
211: struct pcibus_attach_args pba;
212:
213: /* note that we've attached the chipset; can't have 2 LCAs. */
214: /* Um, not sure about this. XXX JH */
215: lcafound = 1;
216:
217: /*
218: * set up the chipset's info; done once at console init time
219: * (maybe), but we must do it twice to take care of things
220: * that need to use memory allocation.
221: */
222: lcp = &lca_configuration;
223: lca_init(lcp, 1);
224:
225: /* XXX print chipset information */
226: printf("\n");
227:
228: lca_dma_init(lcp);
229:
230: switch (cputype) {
231: #ifdef DEC_AXPPCI_33
232: case ST_DEC_AXPPCI_33:
233: pci_axppci_33_pickintr(lcp);
234: break;
235: #endif
236: #ifdef DEC_ALPHABOOK1
237: case ST_ALPHABOOK1:
238: pci_alphabook1_pickintr(lcp);
239: break;
240: #endif
241: #ifdef DEC_EB66
242: case ST_EB66:
243: pci_eb66_pickintr(lcp);
244: break;
245: #endif
246:
247: default:
248: panic("lcaattach: shouldn't be here, really...");
249: }
250:
251: pba.pba_busname = "pci";
252: pba.pba_iot = &lcp->lc_iot;
253: pba.pba_memt = &lcp->lc_memt;
254: pba.pba_dmat =
255: alphabus_dma_get_tag(&lcp->lc_dmat_direct, ALPHA_BUS_PCI);
256: pba.pba_pc = &lcp->lc_pc;
257: pba.pba_domain = pci_ndomains++;
258: pba.pba_bus = 0;
259: pba.pba_bridgetag = NULL;
260: #ifdef notyet
261: pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
262: PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
263: #endif
264: config_found(self, &pba, lcaprint);
265: }
266:
267: int
268: lcaprint(aux, pnp)
269: void *aux;
270: const char *pnp;
271: {
272: register struct pcibus_attach_args *pba = aux;
273:
274: /* only PCIs can attach to LCAes; easy. */
275: if (pnp)
276: printf("%s at %s", pba->pba_busname, pnp);
277: printf(" bus %d", pba->pba_bus);
278: return (UNCONF);
279: }
280:
281: #if 0
282: int
283: lca_bus_get_window(type, window, abst)
284: int type, window;
285: struct alpha_bus_space_translation *abst;
286: {
287: struct lca_config *lcp = &lca_configuration;
288: bus_space_tag_t st;
289:
290: switch (type) {
291: case ALPHA_BUS_TYPE_PCI_IO:
292: st = &lcp->lc_iot;
293: break;
294:
295: case ALPHA_BUS_TYPE_PCI_MEM:
296: st = &lcp->lc_memt;
297: break;
298:
299: default:
300: panic("lca_bus_get_window");
301: }
302:
303: return (alpha_bus_space_get_window(st, window, abst));
304: }
305: #endif
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