Annotation of sys/arch/alpha/pci/irongate_pci.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: irongate_pci.c,v 1.4 2002/03/14 01:26:27 millert Exp $ */
2: /* $NetBSD: irongate_pci.c,v 1.2 2000/06/29 08:58:47 mrg Exp $ */
3:
4: /*-
5: * Copyright (c) 2000 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: /*
41: * PCI Configuration Space support for the AMD 751 (``Irongate'') core logic
42: * chipset.
43: */
44:
45: #include <sys/param.h>
46: #include <sys/systm.h>
47: #include <sys/kernel.h>
48: #include <sys/device.h>
49:
50: #include <uvm/uvm_extern.h>
51:
52: #include <dev/pci/pcireg.h>
53: #include <dev/pci/pcivar.h>
54: #include <alpha/pci/irongatereg.h>
55: #include <alpha/pci/irongatevar.h>
56:
57: void irongate_attach_hook(struct device *, struct device *,
58: struct pcibus_attach_args *);
59: int irongate_bus_maxdevs(void *, int);
60: pcitag_t irongate_make_tag(void *, int, int, int);
61: void irongate_decompose_tag(void *, pcitag_t, int *, int *,
62: int *);
63: pcireg_t irongate_conf_read(void *, pcitag_t, int);
64: void irongate_conf_write(void *, pcitag_t, int, pcireg_t);
65:
66: /* AMD 751 systems are always single-processor, so this is easy. */
67: #define PCI_CONF_LOCK(s) (s) = splhigh()
68: #define PCI_CONF_UNLOCK(s) splx((s))
69:
70: #define PCI_CONF_ADDR (IRONGATE_IO_BASE|IRONGATE_CONFADDR)
71: #define PCI_CONF_DATA (IRONGATE_IO_BASE|IRONGATE_CONFDATA)
72:
73: #define REGVAL(r) (*(__volatile u_int32_t *)ALPHA_PHYS_TO_K0SEG(r))
74:
75: void
76: irongate_pci_init(pci_chipset_tag_t pc, void *v)
77: {
78:
79: pc->pc_conf_v = v;
80: pc->pc_attach_hook = irongate_attach_hook;
81: pc->pc_bus_maxdevs = irongate_bus_maxdevs;
82: pc->pc_make_tag = irongate_make_tag;
83: pc->pc_decompose_tag = irongate_decompose_tag;
84: pc->pc_conf_read = irongate_conf_read;
85: pc->pc_conf_write = irongate_conf_write;
86: }
87:
88: void
89: irongate_attach_hook(struct device *parent, struct device *self,
90: struct pcibus_attach_args *pba)
91: {
92: }
93:
94: int
95: irongate_bus_maxdevs(void *ipv, int busno)
96: {
97:
98: return 32;
99: }
100:
101: pcitag_t
102: irongate_make_tag(void *ipv, int b, int d, int f)
103: {
104:
105: return (b << 16) | (d << 11) | (f << 8);
106: }
107:
108: void
109: irongate_decompose_tag(void *ipv, pcitag_t tag, int *bp, int *dp, int *fp)
110: {
111:
112: if (bp != NULL)
113: *bp = (tag >> 16) & 0xff;
114: if (dp != NULL)
115: *dp = (tag >> 11) & 0x1f;
116: if (fp != NULL)
117: *fp = (tag >> 8) & 0x7;
118: }
119:
120: pcireg_t
121: irongate_conf_read(void *ipv, pcitag_t tag, int offset)
122: {
123: int d;
124:
125: /*
126: * The AMD 751 appears in PCI configuration space, but
127: * that is ... counter-intuitive to the way we normally
128: * attach PCI-Host bridges on the Alpha. So, filter out
129: * the AMD 751 device here. We provide a private entry
130: * point for getting at it from machdep code.
131: */
132: irongate_decompose_tag(ipv, tag, NULL, &d, NULL);
133: if (d == IRONGATE_PCIHOST_DEV)
134: return ((pcireg_t) -1);
135:
136: return (irongate_conf_read0(ipv, tag, offset));
137: }
138:
139: pcireg_t
140: irongate_conf_read0(void *ipv, pcitag_t tag, int offset)
141: {
142: pcireg_t data;
143: int s;
144:
145: PCI_CONF_LOCK(s);
146: REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
147: alpha_mb();
148: data = REGVAL(PCI_CONF_DATA);
149: REGVAL(PCI_CONF_ADDR) = 0;
150: alpha_mb();
151: PCI_CONF_UNLOCK(s);
152:
153: return (data);
154: }
155:
156: void
157: irongate_conf_write(void *ipv, pcitag_t tag, int offset, pcireg_t data)
158: {
159: int s;
160:
161: PCI_CONF_LOCK(s);
162: REGVAL(PCI_CONF_ADDR) = (CONFADDR_ENABLE | tag | (offset & 0xff));
163: alpha_mb();
164: REGVAL(PCI_CONF_DATA) = data;
165: alpha_mb();
166: REGVAL(PCI_CONF_ADDR) = 0;
167: alpha_mb();
168: PCI_CONF_UNLOCK(s);
169: }
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