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Annotation of sys/arch/alpha/pci/apecs_bus_mem.c, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: apecs_bus_mem.c,v 1.6 2001/11/06 19:53:13 miod Exp $  */
                      2: /* $NetBSD: apecs_bus_mem.c,v 1.8 1997/09/02 13:19:12 thorpej Exp $ */
                      3:
                      4: /*
                      5:  * Copyright (c) 1996 Carnegie-Mellon University.
                      6:  * All rights reserved.
                      7:  *
                      8:  * Author: Chris G. Demetriou
                      9:  *
                     10:  * Permission to use, copy, modify and distribute this software and
                     11:  * its documentation is hereby granted, provided that both the copyright
                     12:  * notice and this permission notice appear in all copies of the
                     13:  * software, derivative works or modified versions, and any portions
                     14:  * thereof, and that both notices appear in supporting documentation.
                     15:  *
                     16:  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
                     17:  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
                     18:  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
                     19:  *
                     20:  * Carnegie Mellon requests users of this software to return to
                     21:  *
                     22:  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
                     23:  *  School of Computer Science
                     24:  *  Carnegie Mellon University
                     25:  *  Pittsburgh PA 15213-3890
                     26:  *
                     27:  * any improvements or extensions that they make and grant Carnegie the
                     28:  * rights to redistribute these changes.
                     29:  */
                     30:
                     31: #include <sys/param.h>
                     32: #include <sys/systm.h>
                     33: #include <sys/malloc.h>
                     34: #include <sys/syslog.h>
                     35: #include <sys/device.h>
                     36:
                     37: #include <uvm/uvm_extern.h>
                     38:
                     39: #include <machine/bus.h>
                     40:
                     41: #include <alpha/pci/apecsreg.h>
                     42: #include <alpha/pci/apecsvar.h>
                     43:
                     44: #define        CHIP    apecs
                     45:
                     46: #define        CHIP_EX_MALLOC_SAFE(v)  (((struct apecs_config *)(v))->ac_mallocsafe)
                     47: #define        CHIP_D_MEM_EXTENT(v)    (((struct apecs_config *)(v))->ac_d_mem_ex)
                     48: #define        CHIP_S_MEM_EXTENT(v)    (((struct apecs_config *)(v))->ac_s_mem_ex)
                     49:
                     50: /* Dense region 1 */
                     51: #define        CHIP_D_MEM_W1_BUS_START(v)      0x00000000UL
                     52: #define        CHIP_D_MEM_W1_BUS_END(v)        0xffffffffUL
                     53: #define        CHIP_D_MEM_W1_SYS_START(v)      APECS_PCI_DENSE
                     54: #define        CHIP_D_MEM_W1_SYS_END(v)        (APECS_PCI_DENSE + 0xffffffffUL)
                     55:
                     56: /* Sparse region 1 */
                     57: #define        CHIP_S_MEM_W1_BUS_START(v)      0x00000000UL
                     58: #define        CHIP_S_MEM_W1_BUS_END(v)        0x00ffffffUL
                     59: #define        CHIP_S_MEM_W1_SYS_START(v)      APECS_PCI_SPARSE
                     60: #define        CHIP_S_MEM_W1_SYS_END(v)                                        \
                     61:     (APECS_PCI_SPARSE + (0x01000000UL << 5) - 1)
                     62:
                     63: /* Sparse region 2 */
                     64: #define        CHIP_S_MEM_W2_BUS_START(v)                                      \
                     65:     ((((struct apecs_config *)(v))->ac_haxr1 & EPIC_HAXR1_EADDR) +     \
                     66:       0x01000000UL)
                     67: #define        CHIP_S_MEM_W2_BUS_END(v)                                        \
                     68:     ((((struct apecs_config *)(v))->ac_haxr1 & EPIC_HAXR1_EADDR) +     \
                     69:       0x07ffffffUL)
                     70: #define        CHIP_S_MEM_W2_SYS_START(v)                                      \
                     71:     (APECS_PCI_SPARSE + (0x01000000UL << 5))
                     72: #define        CHIP_S_MEM_W2_SYS_END(v)                                        \
                     73:     (APECS_PCI_SPARSE + (0x08000000UL << 5) - 1)
                     74:
                     75: #include <alpha/pci/pci_swiz_bus_mem_chipdep.c>