Annotation of sys/arch/alpha/pci/apecs.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: apecs.c,v 1.20 2006/12/14 17:36:12 kettenis Exp $ */
2: /* $NetBSD: apecs.c,v 1.16 1996/12/05 01:39:34 cgd Exp $ */
3:
4: /*-
5: * Copyright (c) 2000 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: /*
41: * Copyright (c) 1995, 1996 Carnegie-Mellon University.
42: * All rights reserved.
43: *
44: * Author: Chris G. Demetriou
45: *
46: * Permission to use, copy, modify and distribute this software and
47: * its documentation is hereby granted, provided that both the copyright
48: * notice and this permission notice appear in all copies of the
49: * software, derivative works or modified versions, and any portions
50: * thereof, and that both notices appear in supporting documentation.
51: *
52: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
53: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
54: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
55: *
56: * Carnegie Mellon requests users of this software to return to
57: *
58: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
59: * School of Computer Science
60: * Carnegie Mellon University
61: * Pittsburgh PA 15213-3890
62: *
63: * any improvements or extensions that they make and grant Carnegie the
64: * rights to redistribute these changes.
65: */
66:
67: #include <sys/param.h>
68: #include <sys/systm.h>
69: #include <sys/kernel.h>
70: #include <sys/malloc.h>
71: #include <sys/device.h>
72: #include <uvm/uvm_extern.h>
73:
74: #include <machine/autoconf.h>
75: #include <machine/rpb.h>
76:
77: #include <dev/isa/isareg.h>
78: #include <dev/isa/isavar.h>
79:
80: #include <dev/pci/pcireg.h>
81: #include <dev/pci/pcivar.h>
82: #include <alpha/pci/apecsreg.h>
83: #include <alpha/pci/apecsvar.h>
84: #ifdef DEC_2100_A50
85: #include <alpha/pci/pci_2100_a50.h>
86: #endif
87: #ifdef DEC_EB64PLUS
88: #include <alpha/pci/pci_eb64plus.h>
89: #endif
90: #ifdef DEC_1000A
91: #include <alpha/pci/pci_1000a.h>
92: #endif
93: #ifdef DEC_1000
94: #include <alpha/pci/pci_1000.h>
95: #endif
96:
97: int apecsmatch(struct device *, void *, void *);
98: void apecsattach(struct device *, struct device *, void *);
99:
100: struct cfattach apecs_ca = {
101: sizeof(struct device), apecsmatch, apecsattach,
102: };
103:
104: struct cfdriver apecs_cd = {
105: NULL, "apecs", DV_DULL,
106: };
107:
108: int apecsprint(void *, const char *pnp);
109:
110: /* There can be only one. */
111: int apecsfound;
112: struct apecs_config apecs_configuration;
113:
114: int
115: apecsmatch(parent, match, aux)
116: struct device *parent;
117: void *match;
118: void *aux;
119: {
120: struct mainbus_attach_args *ma = aux;
121:
122: /* Make sure that we're looking for an APECS. */
123: if (strcmp(ma->ma_name, apecs_cd.cd_name) != 0)
124: return (0);
125:
126: if (apecsfound)
127: return (0);
128:
129: return (1);
130: }
131:
132: /*
133: * Set up the chipset's function pointers.
134: */
135: void
136: apecs_init(acp, mallocsafe)
137: struct apecs_config *acp;
138: int mallocsafe;
139: {
140: acp->ac_comanche_pass2 =
141: (REGVAL(COMANCHE_ED) & COMANCHE_ED_PASS2) != 0;
142: acp->ac_memwidth =
143: (REGVAL(COMANCHE_GCR) & COMANCHE_GCR_WIDEMEM) != 0 ? 128 : 64;
144: acp->ac_epic_pass2 =
145: (REGVAL(EPIC_DCSR) & EPIC_DCSR_PASS2) != 0;
146:
147: acp->ac_haxr1 = REGVAL(EPIC_HAXR1);
148: acp->ac_haxr2 = REGVAL(EPIC_HAXR2);
149:
150: if (!acp->ac_initted) {
151: /* don't do these twice since they set up extents */
152: apecs_bus_io_init(&acp->ac_iot, acp);
153: apecs_bus_mem_init(&acp->ac_memt, acp);
154:
155: #if 0
156: /*
157: * We have two I/O windows and 3 MEM windows.
158: */
159: alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 2;
160: alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 3;
161: alpha_bus_get_window = apecs_bus_get_window;
162: #endif
163: }
164: acp->ac_mallocsafe = mallocsafe;
165:
166: apecs_pci_init(&acp->ac_pc, acp);
167: alpha_pci_chipset = &acp->ac_pc;
168: alpha_pci_chipset->pc_name = "apecs";
169: alpha_pci_chipset->pc_mem = APECS_PCI_SPARSE;
170: alpha_pci_chipset->pc_dense = APECS_PCI_DENSE;
171: alpha_pci_chipset->pc_ports = APECS_PCI_SIO;
172: alpha_pci_chipset->pc_bwx = 0;
173: alpha_pci_chipset->pc_hae_mask = EPIC_HAXR1_EADDR;
174:
175: acp->ac_initted = 1;
176: }
177:
178: void
179: apecsattach(parent, self, aux)
180: struct device *parent, *self;
181: void *aux;
182: {
183: struct apecs_config *acp;
184: struct pcibus_attach_args pba;
185:
186: /* note that we've attached the chipset; can't have 2 APECSes. */
187: apecsfound = 1;
188:
189: /*
190: * set up the chipset's info; done once at console init time
191: * (maybe), but doesn't hurt to do twice.
192: */
193: acp = &apecs_configuration;
194: apecs_init(acp, 1);
195:
196: apecs_dma_init(acp);
197:
198: printf(": DECchip %s Core Logic chipset\n",
199: acp->ac_memwidth == 128 ? "21072" : "21071");
200: printf("%s: DC21071-CA pass %d, %d-bit memory bus\n",
201: self->dv_xname, acp->ac_comanche_pass2 ? 2 : 1, acp->ac_memwidth);
202: printf("%s: DC21071-DA pass %d\n", self->dv_xname,
203: acp->ac_epic_pass2 ? 2 : 1);
204: /* XXX print bcache size */
205:
206: if (!acp->ac_epic_pass2)
207: printf("WARNING: 21071-DA NOT PASS2... NO BETS...\n");
208:
209: switch (cputype) {
210: #ifdef DEC_2100_A50
211: case ST_DEC_2100_A50:
212: pci_2100_a50_pickintr(acp);
213: break;
214: #endif
215:
216: #ifdef DEC_EB64PLUS
217: case ST_EB64P:
218: pci_eb64plus_pickintr(acp);
219: break;
220: #endif
221:
222: #ifdef DEC_1000A
223: case ST_DEC_1000A:
224: pci_1000a_pickintr(acp, &acp->ac_iot, &acp->ac_memt,
225: &acp->ac_pc);
226: break;
227: #endif
228:
229: #ifdef DEC_1000
230: case ST_DEC_1000:
231: pci_1000_pickintr(acp, &acp->ac_iot, &acp->ac_memt,
232: &acp->ac_pc);
233: break;
234: #endif
235:
236: default:
237: panic("apecsattach: shouldn't be here, really...");
238: }
239:
240: pba.pba_busname = "pci";
241: pba.pba_iot = &acp->ac_iot;
242: pba.pba_memt = &acp->ac_memt;
243: pba.pba_dmat =
244: alphabus_dma_get_tag(&acp->ac_dmat_direct, ALPHA_BUS_PCI);
245: pba.pba_pc = &acp->ac_pc;
246: pba.pba_domain = pci_ndomains++;
247: pba.pba_bus = 0;
248: pba.pba_bridgetag = NULL;
249: #ifdef notyet
250: pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
251: PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
252: #endif
253: config_found(self, &pba, apecsprint);
254: }
255:
256: int
257: apecsprint(aux, pnp)
258: void *aux;
259: const char *pnp;
260: {
261: register struct pcibus_attach_args *pba = aux;
262:
263: /* only PCIs can attach to APECSes; easy. */
264: if (pnp)
265: printf("%s at %s", pba->pba_busname, pnp);
266: printf(" bus %d", pba->pba_bus);
267: return (UNCONF);
268: }
269:
270: #if 0
271: int
272: apecs_bus_get_window(type, window, abst)
273: int type, window;
274: struct alpha_bus_space_translation *abst;
275: {
276: struct apecs_config *acp = &apecs_configuration;
277: bus_space_tag_t st;
278:
279: switch (type) {
280: case ALPHA_BUS_TYPE_PCI_IO:
281: st = &acp->ac_iot;
282: break;
283:
284: case ALPHA_BUS_TYPE_PCI_MEM:
285: st = &acp->ac_memt;
286: break;
287:
288: default:
289: panic("apecs_bus_get_window");
290: }
291:
292: return (alpha_bus_space_get_window(st, window, abst));
293: }
294: #endif
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to apecs.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / alpha / pci