Annotation of sys/arch/alpha/mcbus/mcbusvar.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: mcbusvar.h,v 1.1 2007/03/16 21:22:27 robert Exp $ */
2: /* $NetBSD: mcbusvar.h,v 1.6 2005/12/11 12:16:17 christos Exp $ */
3:
4: /*
5: * Copyright (c) 1998 by Matthew Jacob
6: * NASA AMES Research Center.
7: * All rights reserved.
8: *
9: * Redistribution and use in source and binary forms, with or without
10: * modification, are permitted provided that the following conditions
11: * are met:
12: * 1. Redistributions of source code must retain the above copyright
13: * notice immediately at the beginning of the file, without modification,
14: * this list of conditions, and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. The name of the author may not be used to endorse or promote products
19: * derived from this software without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25: * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31: * SUCH DAMAGE.
32: */
33:
34: /*
35: * Soft definitions for the MCBUS main system
36: * bus found on AlphaServer 4100 systems.
37: */
38:
39: /*
40: * The structure used to attach devices to the MCbus.
41: */
42: struct mcbus_dev_attach_args {
43: char * ma_name; /* so things aren't confused */
44: u_int8_t ma_gid; /* GID of MCBUS (MCBUS #) */
45: u_int8_t ma_mid; /* Module ID on MCBUS */
46: u_int8_t ma_type; /* Module "type" */
47: u_int8_t ma_configured; /* nonzero if configured */
48: };
49: #define MCBUS_GID_FROM_INSTANCE(unit) (7 - unit)
50:
51: /*
52: * Bus-dependent structure for CPUs. This is dynamically allocated
53: * for each CPU on the MCbus, and glued into the cpu_softc as sc_busdep,
54: * if there is such a beast available. Otherwise, a single global version
55: * is used so that the MCPCIA configuration code can determine toads
56: * like module id and bcache size of the master CPU.
57: */
58: struct mcbus_cpu_busdep {
59: u_int8_t mcbus_cpu_mid; /* MCbus Module ID */
60: u_int8_t mcbus_bcache; /* BCache on this CPU */
61: u_int8_t mcbus_valid;
62: };
63:
64: #define MCBUS_CPU_BCACHE_0MB 0
65: #define MCBUS_CPU_BCACHE_1MB 1
66: #define MCBUS_CPU_BCACHE_4MB 2
67:
68: /*
69: * "types"
70: */
71: #define MCBUS_TYPE_RES 0
72: #define MCBUS_TYPE_UNK 1
73: #define MCBUS_TYPE_MEM 2
74: #define MCBUS_TYPE_CPU 3
75: #define MCBUS_TYPE_PCI 4
76:
77: #ifdef _KERNEL
78: extern struct mcbus_cpu_busdep mcbus_primary;
79: extern const int mcbus_mcpcia_probe_order[];
80: #endif
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