Annotation of sys/arch/alpha/include/cpu.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: cpu.h,v 1.30 2007/05/06 19:05:11 martin Exp $ */
2: /* $NetBSD: cpu.h,v 1.45 2000/08/21 02:03:12 thorpej Exp $ */
3:
4: /*-
5: * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: /*
42: * Copyright (c) 1988 University of Utah.
43: * Copyright (c) 1982, 1990, 1993
44: * The Regents of the University of California. All rights reserved.
45: *
46: * This code is derived from software contributed to Berkeley by
47: * the Systems Programming Group of the University of Utah Computer
48: * Science Department.
49: *
50: * Redistribution and use in source and binary forms, with or without
51: * modification, are permitted provided that the following conditions
52: * are met:
53: * 1. Redistributions of source code must retain the above copyright
54: * notice, this list of conditions and the following disclaimer.
55: * 2. Redistributions in binary form must reproduce the above copyright
56: * notice, this list of conditions and the following disclaimer in the
57: * documentation and/or other materials provided with the distribution.
58: * 3. Neither the name of the University nor the names of its contributors
59: * may be used to endorse or promote products derived from this software
60: * without specific prior written permission.
61: *
62: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
63: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
66: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
67: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
68: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
69: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
70: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
71: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
72: * SUCH DAMAGE.
73: *
74: * from: Utah $Hdr: cpu.h 1.16 91/03/25$
75: *
76: * @(#)cpu.h 8.4 (Berkeley) 1/5/94
77: */
78:
79: #ifndef _ALPHA_CPU_H_
80: #define _ALPHA_CPU_H_
81:
82: #ifndef NO_IEEE
83: typedef union alpha_s_float {
84: u_int32_t i;
85: u_int32_t frac: 23,
86: exp: 8,
87: sign: 1;
88: } s_float;
89:
90: typedef union alpha_t_float {
91: u_int64_t i;
92: u_int64_t frac: 52,
93: exp: 11,
94: sign: 1;
95: } t_float;
96: #endif
97:
98: /*
99: * Exported definitions unique to Alpha cpu support.
100: */
101:
102: #include <machine/alpha_cpu.h>
103: #include <machine/frame.h>
104: #include <machine/param.h>
105:
106: #ifdef _KERNEL
107:
108: #include <machine/bus.h>
109: #include <machine/intr.h>
110: #include <sys/device.h>
111: #include <sys/sched.h>
112:
113: struct pcb;
114: struct proc;
115: struct reg;
116: struct rpb;
117: struct trapframe;
118:
119: extern u_long cpu_implver; /* from IMPLVER instruction */
120: extern u_long cpu_amask; /* from AMASK instruction */
121: extern int bootdev_debug;
122: extern int alpha_fp_sync_complete;
123: extern int alpha_unaligned_print, alpha_unaligned_fix, alpha_unaligned_sigbus;
124:
125: void XentArith(u_int64_t, u_int64_t, u_int64_t); /* MAGIC */
126: void XentIF(u_int64_t, u_int64_t, u_int64_t); /* MAGIC */
127: void XentInt(u_int64_t, u_int64_t, u_int64_t); /* MAGIC */
128: void XentMM(u_int64_t, u_int64_t, u_int64_t); /* MAGIC */
129: void XentRestart(void); /* MAGIC */
130: void XentSys(u_int64_t, u_int64_t, u_int64_t); /* MAGIC */
131: void XentUna(u_int64_t, u_int64_t, u_int64_t); /* MAGIC */
132: void alpha_init(u_long, u_long, u_long, u_long, u_long);
133: int alpha_pa_access(u_long);
134: void ast(struct trapframe *);
135: int badaddr(void *, size_t);
136: int badaddr_read(void *, size_t, void *);
137: u_int64_t console_restart(struct trapframe *);
138: void do_sir(void);
139: void dumpconf(void);
140: void exception_return(void); /* MAGIC */
141: void frametoreg(struct trapframe *, struct reg *);
142: long fswintrberr(void); /* MAGIC */
143: void init_bootstrap_console(void);
144: void init_prom_interface(struct rpb *);
145: void interrupt(unsigned long, unsigned long, unsigned long,
146: struct trapframe *);
147: void machine_check(unsigned long, struct trapframe *, unsigned long,
148: unsigned long);
149: u_int64_t hwrpb_checksum(void);
150: void hwrpb_restart_setup(void);
151: void regdump(struct trapframe *);
152: void regtoframe(struct reg *, struct trapframe *);
153: void savectx(struct pcb *);
154: void switch_exit(struct proc *); /* MAGIC */
155: void switch_trampoline(void); /* MAGIC */
156: void syscall(u_int64_t, struct trapframe *);
157: void trap(unsigned long, unsigned long, unsigned long, unsigned long,
158: struct trapframe *);
159: void trap_init(void);
160: void enable_nsio_ide(bus_space_tag_t);
161:
162: /* Multiprocessor glue; cpu.c */
163: struct cpu_info;
164: int cpu_iccb_send(cpuid_t, const char *);
165: void cpu_iccb_receive(void);
166: void cpu_hatch(struct cpu_info *);
167: void cpu_halt_secondary(unsigned long);
168: void cpu_spinup_trampoline(void); /* MAGIC */
169: void cpu_pause(unsigned long);
170: void cpu_resume(unsigned long);
171:
172: /*
173: * Machine check information.
174: */
175: struct mchkinfo {
176: __volatile int mc_expected; /* machine check is expected */
177: __volatile int mc_received; /* machine check was received */
178: };
179:
180: struct cpu_info {
181: struct device *ci_dev; /* pointer to our device */
182: /*
183: * Public members.
184: */
185: struct schedstate_percpu ci_schedstate; /* scheduler state */
186: #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
187: u_long ci_spin_locks; /* # of spin locks held */
188: u_long ci_simple_locks; /* # of simple locks held */
189: #endif
190: struct proc *ci_curproc; /* current owner of the processor */
191: struct simplelock ci_slock; /* lock on this data structure */
192: cpuid_t ci_cpuid; /* our CPU ID */
193: struct cpu_info *ci_next;
194:
195: /*
196: * Private members.
197: */
198: struct mchkinfo ci_mcinfo; /* machine check info */
199: struct proc *ci_fpcurproc; /* current owner of the FPU */
200: paddr_t ci_curpcb; /* PA of current HW PCB */
201: struct pcb *ci_idle_pcb; /* our idle PCB */
202: paddr_t ci_idle_pcb_paddr; /* PA of idle PCB */
203: struct cpu_softc *ci_softc; /* pointer to our device */
204: u_long ci_want_resched; /* preempt current process */
205: u_long ci_astpending; /* AST is pending */
206: u_long ci_intrdepth; /* interrupt trap depth */
207: struct trapframe *ci_db_regs; /* registers for debuggers */
208: #if defined(MULTIPROCESSOR)
209: u_long ci_flags; /* flags; see below */
210: u_long ci_ipis; /* interprocessor interrupts pending */
211: #endif
212: };
213:
214: #define CPUF_PRIMARY 0x01 /* CPU is primary CPU */
215: #define CPUF_PRESENT 0x02 /* CPU is present */
216: #define CPUF_RUNNING 0x04 /* CPU is running */
217: #define CPUF_PAUSED 0x08 /* CPU is paused */
218: #define CPUF_FPUSAVE 0x10 /* CPU is currently in fpusave_cpu() */
219:
220: void fpusave_cpu(struct cpu_info *, int);
221: void fpusave_proc(struct proc *, int);
222:
223: #define CPU_INFO_UNIT(ci) ((ci)->ci_dev->dv_unit)
224: #define CPU_INFO_ITERATOR int
225: #define CPU_INFO_FOREACH(cii, ci) for (cii = 0, ci = curcpu(); \
226: ci != NULL; ci = ci->ci_next)
227:
228: #if defined(MULTIPROCESSOR)
229: extern __volatile u_long cpus_running;
230: extern __volatile u_long cpus_paused;
231: extern struct cpu_info cpu_info[];
232:
233: #define curcpu() ((struct cpu_info *)alpha_pal_rdval())
234: #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY)
235:
236: void cpu_boot_secondary_processors(void);
237:
238: void cpu_pause_resume(unsigned long, int);
239: void cpu_pause_resume_all(int);
240: #else /* ! MULTIPROCESSOR */
241: extern struct cpu_info cpu_info_store;
242:
243: #define curcpu() (&cpu_info_store)
244: #define CPU_IS_PRIMARY(ci) 1
245: #endif /* MULTIPROCESSOR */
246:
247: #define curproc curcpu()->ci_curproc
248: #define fpcurproc curcpu()->ci_fpcurproc
249: #define curpcb curcpu()->ci_curpcb
250:
251: /*
252: * definitions of cpu-dependent requirements
253: * referenced in generic code
254: */
255: #define cpu_wait(p) /* nothing */
256: #define cpu_number() alpha_pal_whami()
257:
258: /*
259: * Arguments to hardclock and gatherstats encapsulate the previous
260: * machine state in an opaque clockframe. One the Alpha, we use
261: * what we push on an interrupt (a trapframe).
262: */
263: struct clockframe {
264: struct trapframe cf_tf;
265: };
266: #define CLKF_USERMODE(framep) \
267: (((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
268: #define CLKF_PC(framep) ((framep)->cf_tf.tf_regs[FRAME_PC])
269:
270: /*
271: * This isn't perfect; if the clock interrupt comes in before the
272: * r/m/w cycle is complete, we won't be counted... but it's not
273: * like this stastic has to be extremely accurate.
274: */
275: #define CLKF_INTR(framep) (curcpu()->ci_intrdepth)
276:
277: /*
278: * This is used during profiling to integrate system time.
279: */
280: #define PROC_PC(p) ((p)->p_md.md_tf->tf_regs[FRAME_PC])
281:
282: /*
283: * Preempt the current process if in interrupt from user mode,
284: * or after the current trap/syscall if in system mode.
285: */
286: #ifdef MULTIPROCESSOR
287: #define need_resched(ci) \
288: do { \
289: ci->ci_want_resched = 1; \
290: aston(curcpu()); \
291: } while (/*CONSTCOND*/0)
292: #else
293: #define need_resched(ci) \
294: do { \
295: curcpu()->ci_want_resched = 1; \
296: aston(curcpu()); \
297: } while (/*CONSTCOND*/0)
298: #endif
299:
300: /*
301: * Give a profiling tick to the current process when the user profiling
302: * buffer pages are invalid. On the Alpha, request an AST to send us
303: * through trap, marking the proc as needing a profiling tick.
304: */
305: #ifdef notyet
306: #define need_proftick(p) \
307: do { \
308: aston((p)->p_cpu); \
309: } while (/*CONSTCOND*/0)
310: #else
311: #define need_proftick(p) \
312: do { \
313: aston(curcpu()); \
314: } while (/*CONSTCOND*/0)
315: #endif
316:
317: /*
318: * Notify the current process (p) that it has a signal pending,
319: * process as soon as possible.
320: */
321: #ifdef notyet
322: #define signotify(p) aston((p)->p_cpu)
323: #else
324: #define signotify(p) aston(curcpu())
325: #endif
326:
327: /*
328: * XXXSMP
329: * Should we send an AST IPI? Or just let it handle it next time
330: * it sees a normal kernel entry? I guess letting it happen later
331: * follows the `asynchronous' part of the name...
332: */
333: #define aston(ci) ((ci)->ci_astpending = 1)
334: #endif /* _KERNEL */
335:
336: /*
337: * CTL_MACHDEP definitions.
338: */
339: #define CPU_CONSDEV 1 /* dev_t: console terminal device */
340: #define CPU_ROOT_DEVICE 2 /* string: root device name */
341: #define CPU_UNALIGNED_PRINT 3 /* int: print unaligned accesses */
342: #define CPU_UNALIGNED_FIX 4 /* int: fix unaligned accesses */
343: #define CPU_UNALIGNED_SIGBUS 5 /* int: SIGBUS unaligned accesses */
344: #define CPU_BOOTED_KERNEL 6 /* string: booted kernel name */
345: #define CPU_FP_SYNC_COMPLETE 7 /* int: always fixup sync fp traps */
346: #define CPU_CHIPSET 8 /* chipset information */
347: #define CPU_ALLOWAPERTURE 9
348:
349: #define CPU_MAXID 10 /* valid machdep IDs */
350:
351: #define CPU_CHIPSET_MEM 1 /* PCI memory address */
352: #define CPU_CHIPSET_BWX 2 /* PCI supports BWX */
353: #define CPU_CHIPSET_TYPE 3 /* PCI chipset name */
354: #define CPU_CHIPSET_DENSE 4 /* PCI chipset dense memory addr */
355: #define CPU_CHIPSET_PORTS 5 /* PCI port address */
356: #define CPU_CHIPSET_HAE_MASK 6 /* PCI chipset mask for HAE register */
357: #define CPU_CHIPSET_MAXID 7
358:
359: #define CTL_MACHDEP_NAMES { \
360: { 0, 0 }, \
361: { "console_device", CTLTYPE_STRUCT }, \
362: { "root_device", CTLTYPE_STRING }, \
363: { "unaligned_print", CTLTYPE_INT }, \
364: { "unaligned_fix", CTLTYPE_INT }, \
365: { "unaligned_sigbus", CTLTYPE_INT }, \
366: { "booted_kernel", CTLTYPE_STRING }, \
367: { "fp_sync_complete", CTLTYPE_INT }, \
368: { "chipset", CTLTYPE_NODE }, \
369: { "allowaperture", CTLTYPE_INT }, \
370: }
371:
372: #define CTL_CHIPSET_NAMES { \
373: { 0, 0 }, \
374: { "memory", CTLTYPE_QUAD }, \
375: { "bwx", CTLTYPE_INT }, \
376: { "type", CTLTYPE_STRING }, \
377: { "dense_base", CTLTYPE_QUAD }, \
378: { "ports_base", CTLTYPE_QUAD }, \
379: { "hae_mask", CTLTYPE_QUAD }, \
380: }
381:
382: #ifdef _KERNEL
383:
384: struct pcb;
385: struct proc;
386: struct reg;
387: struct rpb;
388: struct trapframe;
389:
390: /* IEEE and VAX FP completion */
391:
392: #ifndef NO_IEEE
393: void alpha_sts(int, s_float *); /* MAGIC */
394: void alpha_stt(int, t_float *); /* MAGIC */
395: void alpha_lds(int, s_float *); /* MAGIC */
396: void alpha_ldt(int, t_float *); /* MAGIC */
397:
398: uint64_t alpha_read_fpcr(void); /* MAGIC */
399: void alpha_write_fpcr(u_int64_t); /* MAGIC */
400:
401: u_int64_t alpha_read_fp_c(struct proc *);
402: void alpha_write_fp_c(struct proc *, u_int64_t);
403:
404: int alpha_fp_complete(u_long, u_long, struct proc *, u_int64_t *);
405: #endif
406:
407: void alpha_enable_fp(struct proc *, int);
408:
409: #ifdef MULTIPROCESSOR
410: #include <sys/mplock.h>
411: #endif
412:
413: #endif /* _KERNEL */
414: #endif /* _ALPHA_CPU_H_ */
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