Annotation of sys/arch/alpha/include/atomic.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: atomic.h,v 1.6 2007/03/17 09:12:03 martin Exp $ */
2: /* $NetBSD: atomic.h,v 1.7 2001/12/17 23:34:57 thorpej Exp $ */
3:
4: /*-
5: * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: /*
42: * Misc. `atomic' operations.
43: */
44:
45: #ifndef _ALPHA_ATOMIC_H_
46: #define _ALPHA_ATOMIC_H_
47:
48: #if defined(_KERNEL)
49:
50: /*
51: * atomic_setbits_ulong:
52: *
53: * Atomically set bits in a `unsigned long'.
54: */
55: static __inline void
56: atomic_setbits_ulong(__volatile unsigned long *ulp, unsigned long v)
57: {
58: unsigned long t0;
59:
60: __asm __volatile(
61: "# BEGIN atomic_setbits_ulong\n"
62: "1: ldq_l %0, %3 \n"
63: " or %0, %2, %0 \n"
64: " stq_c %0, %1 \n"
65: " beq %0, 2f \n"
66: " mb \n"
67: " br 3f \n"
68: "2: br 1b \n"
69: "3: \n"
70: " # END atomic_setbits_ulong"
71: : "=&r" (t0), "=m" (*ulp)
72: : "r" (v), "m" (*ulp)
73: : "memory");
74: }
75:
76: /*
77: * atomic_clearbits_ulong:
78: *
79: * Atomically clear bits in a `unsigned long'.
80: */
81: static __inline void
82: atomic_clearbits_ulong(__volatile unsigned long *ulp, unsigned long v)
83: {
84: unsigned long t0;
85:
86: __asm __volatile(
87: "# BEGIN atomic_clearbits_ulong\n"
88: "1: ldq_l %0, %3 \n"
89: " and %0, %2, %0 \n"
90: " stq_c %0, %1 \n"
91: " beq %0, 2f \n"
92: " mb \n"
93: " br 3f \n"
94: "2: br 1b \n"
95: "3: \n"
96: " # END atomic_clearbits_ulong"
97: : "=&r" (t0), "=m" (*ulp)
98: : "r" (~v), "m" (*ulp)
99: : "memory");
100: }
101:
102: /*
103: * atomic_add_ulong:
104: *
105: * Atomically add a value to a `unsigned long'.
106: */
107: static __inline void
108: atomic_add_ulong(__volatile unsigned long *ulp, unsigned long v)
109: {
110: unsigned long t0;
111:
112: __asm __volatile(
113: "# BEGIN atomic_add_ulong\n"
114: "1: ldq_l %0, %3 \n"
115: " addq %0, %2, %0 \n"
116: " stq_c %0, %1 \n"
117: " beq %0, 2f \n"
118: " mb \n"
119: " br 3f \n"
120: "2: br 1b \n"
121: "3: \n"
122: " # END atomic_add_ulong"
123: : "=&r" (t0), "=m" (*ulp)
124: : "r" (v), "m" (*ulp)
125: : "memory");
126: }
127:
128: /*
129: * atomic_sub_ulong:
130: *
131: * Atomically subtract a value from a `unsigned long'.
132: */
133: static __inline void
134: atomic_sub_ulong(__volatile unsigned long *ulp, unsigned long v)
135: {
136: unsigned long t0;
137:
138: __asm __volatile(
139: "# BEGIN atomic_sub_ulong\n"
140: "1: ldq_l %0, %3 \n"
141: " subq %0, %2, %0 \n"
142: " stq_c %0, %1 \n"
143: " beq %0, 2f \n"
144: " mb \n"
145: " br 3f \n"
146: "2: br 1b \n"
147: "3: \n"
148: " # END atomic_sub_ulong"
149: : "=&r" (t0), "=m" (*ulp)
150: : "r" (v), "m" (*ulp)
151: : "memory");
152: }
153:
154: /*
155: * atomic_loadlatch_ulong:
156: *
157: * Atomically load and latch a `unsigned long' value.
158: */
159: static __inline unsigned long
160: atomic_loadlatch_ulong(__volatile unsigned long *ulp, unsigned long v)
161: {
162: unsigned long t0, v0;
163:
164: __asm __volatile(
165: "# BEGIN atomic_loadlatch_ulong\n"
166: "1: mov %3, %0 \n"
167: " ldq_l %1, %4 \n"
168: " stq_c %0, %2 \n"
169: " beq %0, 2f \n"
170: " mb \n"
171: " br 3f \n"
172: "2: br 1b \n"
173: "3: \n"
174: " # END atomic_loadlatch_ulong"
175: : "=&r" (t0), "=r" (v0), "=m" (*ulp)
176: : "r" (v), "m" (*ulp)
177: : "memory");
178:
179: return (v0);
180: }
181:
182: /*
183: * atomic_setbits_int:
184: *
185: * Atomically set bits in a `unsigned int'.
186: */
187: static __inline void
188: atomic_setbits_int(__volatile unsigned int *uip, unsigned int v)
189: {
190: unsigned int t0;
191:
192: __asm __volatile(
193: "# BEGIN atomic_setbits_ulong\n"
194: "1: ldl_l %0, %3 \n"
195: " or %0, %2, %0 \n"
196: " stl_c %0, %1 \n"
197: " beq %0, 2f \n"
198: " mb \n"
199: " br 3f \n"
200: "2: br 1b \n"
201: "3: \n"
202: " # END atomic_setbits_int"
203: : "=&r" (t0), "=m" (*uip)
204: : "r" (v), "m" (*uip)
205: : "memory");
206: }
207:
208: /*
209: * atomic_clearbits_int:
210: *
211: * Atomically clear bits in a `unsigned int'.
212: */
213: static __inline void
214: atomic_clearbits_int(__volatile unsigned int *uip, unsigned int v)
215: {
216: unsigned int t0;
217:
218: __asm __volatile(
219: "# BEGIN atomic_clearbits_int\n"
220: "1: ldl_l %0, %3 \n"
221: " and %0, %2, %0 \n"
222: " stl_c %0, %1 \n"
223: " beq %0, 2f \n"
224: " mb \n"
225: " br 3f \n"
226: "2: br 1b \n"
227: "3: \n"
228: " # END atomic_clearbits_int"
229: : "=&r" (t0), "=m" (*uip)
230: : "r" (~v), "m" (*uip)
231: : "memory");
232: }
233:
234: #endif /* defined(_KERNEL) */
235: #endif /* _ALPHA_ATOMIC_H_ */
CVSweb