Annotation of sys/arch/alpha/alpha/ipifuncs.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: ipifuncs.c,v 1.1 2007/04/13 08:31:50 martin Exp $ */
2: /* $NetBSD: ipifuncs.c,v 1.9 1999/12/02 01:09:11 thorpej Exp $ */
3:
4: /*-
5: * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: /*
42: * Interprocessor interrupt handlers.
43: */
44:
45: #include <sys/param.h>
46: #include <sys/device.h>
47: #include <sys/systm.h>
48:
49: #include <uvm/uvm_extern.h>
50:
51: #include <machine/atomic.h>
52: #include <machine/alpha_cpu.h>
53: #include <machine/cpu.h>
54: #include <machine/intr.h>
55: #include <machine/rpb.h>
56:
57: void alpha_ipi_halt(void);
58: void alpha_ipi_tbia(void);
59: void alpha_ipi_tbiap(void);
60: void alpha_ipi_imb(void);
61: void alpha_ipi_ast(void);
62:
63: /*
64: * NOTE: This table must be kept in order with the bit definitions
65: * in <machine/intr.h>.
66: */
67: ipifunc_t ipifuncs[ALPHA_NIPIS] = {
68: alpha_ipi_halt,
69: alpha_ipi_tbia,
70: alpha_ipi_tbiap,
71: alpha_ipi_imb,
72: alpha_ipi_ast,
73: };
74:
75: /*
76: * Send an interprocessor interrupt.
77: */
78: void
79: alpha_send_ipi(cpu_id, ipimask)
80: u_long cpu_id, ipimask;
81: {
82:
83: #ifdef DIAGNOSTIC
84: if (cpu_id >= hwrpb->rpb_pcs_cnt ||
85: cpu_info[cpu_id].ci_dev == NULL)
86: panic("alpha_sched_ipi: bogus cpu_id");
87: #endif
88:
89: atomic_setbits_ulong(&cpu_info[cpu_id].ci_ipis, ipimask);
90: alpha_pal_wripir(cpu_id);
91: }
92:
93: /*
94: * Broadcast an IPI to all but ourselves.
95: */
96: void
97: alpha_broadcast_ipi(ipimask)
98: u_long ipimask;
99: {
100: u_long i;
101:
102: for (i = 0; i < hwrpb->rpb_pcs_cnt; i++) {
103: if (cpu_info[i].ci_dev == NULL)
104: continue;
105: alpha_send_ipi(i, ipimask);
106: }
107: }
108:
109: /*
110: * Send an IPI to all in the list but ourselves.
111: */
112: void
113: alpha_multicast_ipi(cpumask, ipimask)
114: u_long cpumask, ipimask;
115: {
116: u_long i;
117:
118: cpumask &= cpus_running;
119: cpumask &= ~(1UL << cpu_number());
120: if (cpumask == 0)
121: return;
122:
123: for (i = 0; i < hwrpb->rpb_pcs_cnt; i++) {
124: if ((cpumask & (1UL << i)) == 0)
125: continue;
126: alpha_send_ipi(i, ipimask);
127: }
128: }
129:
130: void
131: alpha_ipi_halt()
132: {
133: u_long cpu_id = alpha_pal_whami();
134: struct pcs *pcsp = LOCATE_PCS(hwrpb, cpu_id);
135:
136: /* Disable interrupts. */
137: (void) splhigh();
138:
139: printf("%s: shutting down...\n", cpu_info[cpu_id].ci_dev->dv_xname);
140: atomic_clearbits_ulong(&cpus_running, (1UL << cpu_id));
141:
142: pcsp->pcs_flags &= ~(PCS_RC | PCS_HALT_REQ);
143: pcsp->pcs_flags |= PCS_HALT_STAY_HALTED;
144: alpha_pal_halt();
145: /* NOTREACHED */
146: }
147:
148: void
149: alpha_ipi_tbia()
150: {
151: u_long cpu_id = alpha_pal_whami();
152:
153: /* If we're doing a TBIA, we don't need to do a TBIAP or a SHOOTDOWN. */
154: atomic_clearbits_ulong(&cpu_info[cpu_id].ci_ipis,
155: ALPHA_IPI_TBIAP|ALPHA_IPI_SHOOTDOWN);
156:
157: ALPHA_TBIA();
158: }
159:
160: void
161: alpha_ipi_tbiap()
162: {
163:
164: /* Can't clear SHOOTDOWN here; might have PG_ASM mappings. */
165:
166: ALPHA_TBIAP();
167: }
168:
169: void
170: alpha_ipi_imb()
171: {
172:
173: alpha_pal_imb();
174: }
175:
176: void
177: alpha_ipi_ast()
178: {
179:
180: aston(curcpu());
181: }
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