Annotation of prex-old/sys/arch/i386/pc/clock.c, Revision 1.1.1.1.2.1
1.1 nbrk 1: /*-
2: * Copyright (c) 2005-2007, Kohsuke Ohtani
3: * All rights reserved.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: * 3. Neither the name of the author nor the names of any co-contributors
14: * may be used to endorse or promote products derived from this software
15: * without specific prior written permission.
16: *
17: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27: * SUCH DAMAGE.
28: */
29:
30: /*
31: * clock.c - clock driver
32: */
33:
34: #include <kernel.h>
35: #include <timer.h>
36: #include <irq.h>
1.1.1.1.2.1! nbrk 37: #include <locore.h>
1.1 nbrk 38:
39: /* Interrupt vector for clock */
40: #define CLOCK_IRQ 0
41:
42: /* The internal tick rate in ticks per second */
43: #define PIT_TICK 1193180L
44:
45: /* The latch count value for the current HZ setting */
46: #define PIT_LATCH ((PIT_TICK + (HZ / 2)) / HZ)
47:
48: /* I/O port for programmable interval timer */
49: #define PIT_CH0 0x40
50: #define PIT_CTRL 0x43
51:
52: /*
53: * Clock interrupt service routine.
54: * No H/W reprogram is required.
55: */
56: static int
57: clock_isr(int irq)
58: {
59:
60: irq_lock();
61: timer_tick();
62: irq_unlock();
63:
64: return INT_DONE;
65: }
66:
67: /*
68: * Initialize clock H/W chip.
69: * Setup clock tick rate and install clock ISR.
70: */
71: void
72: clock_init(void)
73: {
1.1.1.1.2.1! nbrk 74: irq_t clock_irq;
1.1 nbrk 75:
76: outb_p(0x34, PIT_CTRL); /* Command to set generator mode */
77: outb_p((u_char)(PIT_LATCH & 0xff), PIT_CH0); /* LSB */
78: outb_p((u_char)((PIT_LATCH >> 8) & 0xff), PIT_CH0); /* MSB */
79:
1.1.1.1.2.1! nbrk 80: clock_irq = irq_attach(CLOCK_IRQ, IPL_CLOCK, 0, &clock_isr, NULL);
! 81: ASSERT(clock_irq != NULL);
1.1 nbrk 82:
1.1.1.1.2.1! nbrk 83: DPRINTF(("Clock rate: %d ticks/sec\n", CONFIG_HZ));
1.1 nbrk 84: }
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