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Annotation of prex-old/sys/arch/arm/cats/platform.h, Revision 1.4

1.1       nbrk        1: /*
1.4     ! nbrk        2:  * $Id$
        !             3:  */
        !             4: /*
1.1       nbrk        5:  * Copyright (c) 2007, Kohsuke Ohtani
                      6:  * All rights reserved.
                      7:  *
                      8:  * Redistribution and use in source and binary forms, with or without
                      9:  * modification, are permitted provided that the following conditions
                     10:  * are met:
                     11:  * 1. Redistributions of source code must retain the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer.
                     13:  * 2. Redistributions in binary form must reproduce the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer in the
                     15:  *    documentation and/or other materials provided with the distribution.
                     16:  * 3. Neither the name of the author nor the names of any co-contributors
                     17:  *    may be used to endorse or promote products derived from this software
                     18:  *    without specific prior written permission.
                     19:  *
                     20:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
                     21:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     22:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     23:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
                     24:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     25:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     26:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     27:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     28:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     29:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     30:  * SUCH DAMAGE.
                     31:  */
                     32:
1.2       nbrk       33: #ifndef _CATS_PLATFORM_H
                     34: #define _CATS_PLATFORM_H
1.1       nbrk       35:
                     36: /*
1.4     ! nbrk       37:  * Memory locations.
1.1       nbrk       38:  */
                     39:
                     40: #define PAGE_OFFSET    0x00000000
                     41:
1.3       nbrk       42: #define KERNEL_BASE    0x00100000
                     43: #define KERNEL_MAX     0x00400000
                     44: #define USER_BASE      0x00400000
                     45: #define USER_MAX       0x02000000
1.2       nbrk       46:
1.3       nbrk       47: #define BOOT_INFO_SIZE 0x00000800
                     48: #define BOOT_INFO      (0x00100000 - BOOT_INFO_SIZE)
                     49: #define BOOT_STACK     0x00002800
                     50: #define INT_STACK      0x00004800
                     51: #define SYS_STACK      0x00008800
1.1       nbrk       52:
                     53: #ifndef __ASSEMBLY__
                     54:
                     55: /*
                     56:  * Page mapping
                     57:  */
                     58: #define phys_to_virt(p_addr)   (void *)((u_long)(p_addr) + PAGE_OFFSET)
                     59: #define virt_to_phys(v_addr)   (void *)((u_long)(v_addr) - PAGE_OFFSET)
                     60:
                     61: /*
                     62:  * Kernel/User Locations
                     63:  */
                     64: #define kern_area(addr)        \
                     65:        (((u_long)(addr) >= KERNEL_BASE) && ((u_long)(addr) < KERNEL_MAX))
                     66: #define user_area(addr) \
                     67:        (((u_long)(addr) >= USER_BASE) && ((u_long)(addr) < USER_MAX))
                     68:
                     69: /*
1.4     ! nbrk       70:  * Interrupt glue
1.1       nbrk       71:  */
1.4     ! nbrk       72: #define NIRQS          32              /* number of interrupt vectors */
1.1       nbrk       73:
                     74: static __inline void
                     75: interrupt_enable(void)
                     76: {
                     77: #ifndef __lint__
                     78:        u_long val;
                     79:
                     80:        __asm__ __volatile__(
                     81:                "mrs %0, cpsr\n\t"
                     82:                "bic %0, %0, #0xc0\n\t"         /* Enable IRQ & FIQ */
                     83:                "msr cpsr_c, %0\n\t"
                     84:                :"=&r" (val)
                     85:                :
                     86:                : "memory");
                     87: #endif
                     88: }
                     89:
                     90: static __inline void
                     91: interrupt_disable(void)
                     92: {
                     93: #ifndef __lint__
                     94:        u_long val;
                     95:
                     96:        __asm__ __volatile__(
                     97:                "mrs %0, cpsr\n\t"
                     98:                "orr %0, %0, #0xc0\n\t"         /* Disable IRQ & FIQ */
                     99:                "msr cpsr_c, %0\n\t"
                    100:                :"=&r" (val)
                    101:                :
                    102:                : "memory");
                    103: #endif
                    104: }
                    105:
                    106: static __inline void
                    107: interrupt_save(int *sts)
                    108: {
                    109:        u_long val;
                    110:
                    111:        __asm__ __volatile__(
                    112:                "mrs %0, cpsr\n\t"
                    113:                :"=&r" (val)
                    114:                :
                    115:                :"memory");
                    116:        *sts = (int)val;
                    117: }
                    118:
                    119: static __inline void
                    120: interrupt_restore(int sts)
                    121: {
                    122:
                    123:        __asm__ __volatile__(
                    124:                "msr cpsr_c, %0\n\t"
                    125:                :
                    126:                :"r" (sts)
                    127:                :"memory");
                    128: }
                    129:
                    130: extern void interrupt_mask(int);
                    131: extern void interrupt_unmask(int, int);
                    132: extern void interrupt_setup(int, int);
                    133: extern void interrupt_init(void);
                    134:
                    135: /* Interrupt mode for interrupt_setup() */
                    136: #define IMODE_EDGE     0               /* edge trigger */
                    137: #define IMODE_LEVEL    1               /* level trigger */
                    138:
                    139: extern void clock_init(void);
                    140:
                    141: extern void diag_init(void);
                    142: extern void diag_print(char *);
                    143:
                    144: static __inline void
                    145: machine_idle(void)
                    146: {
                    147: }
                    148:
                    149: static __inline void
                    150: machine_reset(void)
                    151: {
                    152: }
                    153:
                    154: extern void machine_init(void);
                    155:
                    156: #endif /* !__ASSEMBLY__ */
1.2       nbrk      157: #endif /* !_CATS_PLATFORM_H */