prex-old/sys/arch/arm/cats/clock.c - diff

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Diff for /prex-old/sys/arch/arm/cats/clock.c between version 1.1 and 1.2

version 1.1, 2008/07/18 21:21:48

version 1.2, 2008/07/22 15:40:52

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* clock.c - clock driver

* clock.c - SA-110 Operatin System Timer driver.

#include <kernel.h>

#include <timer.h>

#include <irq.h>

* This OST is an incrementing counter running at 3.6864 MHz.

* It contains four 32-bit Match Registers which can be programmed

* to cause periodic interrupts in SAIC.

* For our main clock service we use channel 0.

#define SAOST_INTRNO 26 /* channel 0 match */

#define SAOST_FREQ 3686400 /* ticks per second */

#define SAOST_BASE 0x90000000

#define SAOST_OSMR(x) (x * 4) /* Match Register x */

#define SAOST_OSCR 0x10

#define SAOST_OSSR 0x14

#define SAOST_OIER 0x1c

* Clock interrupt service routine.

* No H/W reprogram is required.

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static int

clock_isr(int irq)

{

#if 0

irq_lock();

timer_tick();

irq_unlock();

#endif

return INT_DONE;

}

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void

clock_init(void)

{

/* TODO */

int clock_irq;

/* disable interrupts on matching all channels */

*(volatile uint32_t *)(SAOST_BASE + SAOST_OIER) = 0;

/* set channel 0 to 1/100 / sec */

*(volatile uint32_t *)(SAOST_BASE + SAOST_OSMR(0)) = SAOST_FREQ / CONFIG_HZ;

clock_irq = irq_attach(SAOST_INTRNO, IPL_CLOCK, 0, clock_isr, NULL);

ASSERT(clock_irq != -1);

/* enable interrupts on channel 0 compare */

*(volatile uint32_t *)(SAOST_BASE + SAOST_OIER) = 1;

}

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