File: [local] / prex-old / boot / arm / cats / head.S (download)
Revision 1.1, Thu Jul 17 18:10:36 2008 UTC (15 years, 10 months ago) by nbrk
Branch: MAIN
initial bits of bootldr port to the Simtec's EB110ATX 'CATS' evaluation boards.
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/*-
* Copyright (c) 2005, Kohsuke Ohtani
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* head.S - low level platform support
*
* This file contains the code from crt0.S which is released under
* public domain by Jeff Frohwein.
*/
/*
* I know that I'm a bit slacky, but this is the memory map for cats.
* GXemul> device list
* 0: ram @ 0x00041000000, len = 0x40000 (DYNTRANS R+W)
* 1: footbridge @ 0x00042000000, len = 0x400
* 2: ram @ 0x00050000000, len = 0x10000 (DYNTRANS R+W)
* 3: footbridge_isa @ 0x00079000000, len = 0x8
* 4: footbridge_pci @ 0x0007b000000, len = 0x1000000
* 5: 8259 @ 0x0007c000020, len = 0x2
* 6: 8253 @ 0x0007c000040, len = 0x4
* 7: pckbc @ 0x0007c000060, len = 0x10
* 8: pccmos @ 0x0007c000070, len = 0x4
* 9: 8259 [secondary] @ 0x0007c0000a0, len = 0x2
* 10: ns16550 [tty1] @ 0x0007c0002f8, len = 0x8
* 11: lpt [lpt] @ 0x0007c000378, len = 0x3
* 12: vga_ctrl @ 0x0007c0003c0, len = 0x20
* 13: ns16550 [tty0] @ 0x0007c0003f8, len = 0x8
* 14: dec21143 [10:20:30:00:00:10] @ 0x0007c010000, len = 0x100
* 15: ram @ 0x00080000000, len = 0x1000 (DYNTRANS R+W)
* 16: ram [mirror] @ 0x00080010000, len = 0x100 ()
* 17: vga_gfx @ 0x000800a0000, len = 0x18000 ()
* 18: vga_charcells @ 0x000800b8000, len = 0x8000 (DYNTRANS R+W)
* 19: ram [mirror] @ 0x000c0000000, len = 0x20000000 (DYNTRANS R+W)
* 20: ram [mirror] @ 0x000f0000000, len = 0x1000000 (DYNTRANS R+W)
* 21: fb [VGA] @ 0x01c00000000, len = 0xbb800 (DYNTRANS R+W)
* 22: mc146818 @ 0x01d00000000, len = 0x2
*
* Firmware loads us at 0xf0000000 with MMU on and TTB @0x006f8000.
*/
#include <conf/config.h>
#include <platform.h>
#define ENTRY(x) .global x; .align; x##:
.section ".text","ax"
.code 32
/*
* Kernel start point
*/
ENTRY(boot_entry)
b start_vector
stack_end: .word BOOT_STACK+0xf00
start_vector:
mov r0, #0xd3 /* Enter SVC mode, Disable IRQ,FIQ */
msr cpsr_c, r0
mrc p15, 0, r0, c1, c0
bic r0, r0, #1 /* disable MMU */
mcr p15, 0, r0, c1, c0
ldr sp, stack_end
/* initialize boot console */
bl bootcons_init
ldr r0, =loader_main
bx r0 /* Change to ARM mode */
/*
* Start kernel
*/
ENTRY(start_kernel)
bx r0
.section .tail,"ax"
dummy:
.byte 0xff
.end