Revision 1.1, Mon Oct 29 20:12:18 2007 UTC (16 years, 6 months ago) by init
Branch: MAIN
CVS Tags: HEAD

add tairqc, driver for testarm Interrupt Controller Unit;
this irqc contains only three registers: intr status, mask and unmask.
on testarm we will be invoked from low-level when CPU Ext. IRQ is asserted.

devconfig machinery will support vectors-table allowing us to switch
control flow based on this table into devices' interrupt handlers

he-he, still more work on the road, but i need to commit it to work on it.