Annotation of funnyos/arch/testarm/dev/tairqc.c, Revision 1.5
1.1 init 1: /*
1.5 ! init 2: * $Id: tairqc.c,v 1.4 2007/11/02 12:36:13 init Exp $
1.1 init 3: */
4: #include <sys/types.h>
5: #include <sys/device.h>
6: #include <sys/bus.h>
1.3 init 7: #include <sys/kern_irq.h>
1.1 init 8:
9: #include <arch/testarm/dev/tairqcvar.h>
10: #include <arch/testarm/dev/tairqcreg.h>
1.3 init 11: #include <libkern/printf.h>
1.1 init 12:
1.5 ! init 13: #define TAIRQC_DEBUG
! 14:
! 15: #ifdef TAIRQC_DEBUG
! 16: #define DPRINTF(x...) do { printf(x); } while (0)
! 17: #else
! 18: #define DPRINTF(x...) { }
! 19: #endif
! 20:
1.1 init 21: /*
22: * testarm Interrupt Controller Unit support.
23: */
24: int tairqc_attach(struct device *self, uint32_t loc, uint8_t flags);
1.3 init 25: void tairqc_mask_intr(uint8_t intrno);
26: void tairqc_unmask_intr(uint8_t intrno);
27: uint32_t tairqc_intrstatus(void);
1.1 init 28: void tairqc_irq(void);
29:
1.3 init 30: extern void (*irq_trampoline_func)(void);
31: struct tairqc_dd *irqcdd; /* current irq device */
1.1 init 32:
33: struct driver tairqc_dr = {
34: sizeof(struct tairqc_dd),
35: tairqc_attach,
1.2 init 36: NULL,
1.1 init 37: NULL
38: };
39:
40:
41: int
42: tairqc_attach(struct device *self, uint32_t loc, uint8_t flags)
43: {
44: struct tairqc_dd *ddp = self->dv_devdata;
45:
46: /* leap to parent's bus_handle */
47: ddp->td_bushandlep = self->dv_parent->dv_aux;
48:
1.3 init 49: /* save locator */
50: ddp->td_ioaddr = loc ? loc : TAIRQC_REG_BASE;
1.1 init 51:
1.3 init 52: irqcdd = ddp;
53:
54: printf("testarm IRQ Controller (2=cons, 3=ether, 4=rtc, 6=mp)\n");
55:
56: /* override trampoline so core irq jumps to us */
57: irq_trampoline_func = tairqc_irq;
58:
59: /* XXX unmask rtc intr */
60: tairqc_unmask_intr(4);
1.4 init 61:
62: return(0);
1.3 init 63: }
64:
65:
66: void
67: tairqc_mask_intr(uint8_t intrno)
68: {
69: bus_write_1(irqcdd->td_bushandlep, irqcdd->td_ioaddr + TAIRQC_OFF_IRQMASK, intrno);
1.5 ! init 70: DPRINTF("tairqc_mask_intr: masked interrupt no. %d (status=0x%x)\n", intrno, tairqc_intrstatus());
1.3 init 71: }
72:
73:
74: void
75: tairqc_unmask_intr(uint8_t intrno)
76: {
77: bus_write_1(irqcdd->td_bushandlep, irqcdd->td_ioaddr + TAIRQC_OFF_IRQUNMASK, intrno);
1.5 ! init 78: DPRINTF("tairqc_unmask_intr: unmasked interrupt no. %d (status=0x%x)\n", intrno, tairqc_intrstatus());
1.3 init 79: }
80:
81:
82: uint32_t
83: tairqc_intrstatus(void)
84: {
85: bus_read_4(irqcdd->td_bushandlep, irqcdd->td_ioaddr + TAIRQC_OFF_IRQSTATUS);
1.1 init 86: }
87:
88:
89: void
90: tairqc_irq(void)
91: {
92: /*
1.3 init 93: * Process an IRQ.
1.1 init 94: */
1.3 init 95: uint32_t irqstatus;
96:
97: /* read intr status; one bit per intr source */
98: irqstatus = tairqc_intrstatus();
1.1 init 99:
1.5 ! init 100: DPRINTF("tairqc_itq: got interrupt (status=0x%x)\n", irqstatus);
1.1 init 101: }
102:
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