===================================================================
RCS file: /cvs/funnyos/arch/testarm/dev/tairqc.c,v
retrieving revision 1.4
retrieving revision 1.7
diff -u -r1.4 -r1.7
--- funnyos/arch/testarm/dev/tairqc.c	2007/11/02 12:36:13	1.4
+++ funnyos/arch/testarm/dev/tairqc.c	2007/11/05 20:11:25	1.7
@@ -1,15 +1,25 @@
 /*
- * $Id: tairqc.c,v 1.4 2007/11/02 12:36:13 init Exp $
+ * $Id: tairqc.c,v 1.7 2007/11/05 20:11:25 init Exp $
  */
 #include <sys/types.h>
 #include <sys/device.h>
 #include <sys/bus.h>
 #include <sys/kern_irq.h>
 
+#include <dev/cpuvar.h>
+
 #include <arch/testarm/dev/tairqcvar.h>
 #include <arch/testarm/dev/tairqcreg.h>
 #include <libkern/printf.h>
 
+/* #define TAIRQC_DEBUG */
+
+#ifdef TAIRQC_DEBUG
+#define DPRINTF(x...) 	do { printf(x); } while (0)
+#else
+#define DPRINTF(x...) 	{ }
+#endif
+ 
 /*
  * testarm Interrupt Controller Unit support.
  */
@@ -34,6 +44,7 @@
 tairqc_attach(struct device *self, uint32_t loc, uint8_t flags)
 {
 	struct tairqc_dd *ddp = self->dv_devdata;
+	uint8_t intrno;
 
 	/* leap to parent's bus_handle */
 	ddp->td_bushandlep = self->dv_parent->dv_aux;
@@ -48,9 +59,15 @@
 	/* override trampoline so core irq jumps to us */
 	irq_trampoline_func = tairqc_irq;
 
+	/* mask all interrupts */
+	for (intrno = 0; intrno < 32; intrno++)
+		tairqc_mask_intr(intrno);
+
 	/* XXX unmask rtc intr */
 	tairqc_unmask_intr(4);
 
+	__cpu_enable_irq();
+
 	return(0);
 }
 
@@ -59,6 +76,7 @@
 tairqc_mask_intr(uint8_t intrno)
 {
 	bus_write_1(irqcdd->td_bushandlep, irqcdd->td_ioaddr + TAIRQC_OFF_IRQMASK, intrno);
+	DPRINTF("tairqc_mask_intr: masked interrupt no. %d (status=0x%x)\n", intrno, tairqc_intrstatus());
 }
 
 
@@ -66,6 +84,7 @@
 tairqc_unmask_intr(uint8_t intrno)
 {
 	bus_write_1(irqcdd->td_bushandlep, irqcdd->td_ioaddr + TAIRQC_OFF_IRQUNMASK, intrno);
+	DPRINTF("tairqc_unmask_intr: unmasked interrupt no. %d (status=0x%x)\n", intrno, tairqc_intrstatus());
 }
 
 
@@ -81,12 +100,27 @@
 {
 	/*
 	 * Process an IRQ.
+	 * Check interrupt status of the irqc and execute corresponding intr handlers
+	 * for every asserted interrupt source (could be 0...31 on tairqc)
 	 */
-	 uint32_t irqstatus;
+	uint32_t irqstatus;
+	uint8_t intrno;
 
 	/* read intr status; one bit per intr source */
 	irqstatus = tairqc_intrstatus();
 
-	printf("irqc: irq status 0x%x\n", irqstatus);
+	DPRINTF("tairqc_irq: got interrupt (status=0x%x)\n", irqstatus);
+
+	/* exit if no interrupts; should not happen */
+	if (irqstatus == 0)
+		return;
+
+	/* let kern_irq throw us to the right place */
+	for (intrno = 0; intrno < 32; intrno++)
+		if (irqstatus & (1 << intrno)) {
+			/* interrupt line is active */
+			intr_execute(intrno);
+		}
+
 }