Annotation of funnyos/arch/sam7s64/dev/sapio.c, Revision 1.2
1.1 nbrk 1: /*
1.2 ! nbrk 2: * $Id: sapio.c,v 1.1 2007/11/15 20:48:27 nbrk Exp $
1.1 nbrk 3: */
4: #include <sys/types.h>
5: #include <sys/device.h>
6: #include <sys/bus.h>
7: #include <sys/gpio.h>
8:
1.2 ! nbrk 9: #include <arch/sam7s64/dev/at91sam7.h>
1.1 nbrk 10: #include <arch/sam7s64/dev/sapiovar.h>
11:
12: /*
13: * Parallel Input Output controller.
14: */
15:
16: int sapio_attach(struct device *, uint32_t, uint8_t);
17: uint8_t sapio_pinread(void *selfdd, uint32_t pin);
18: void sapio_pinwrite(void *selfdd, uint32_t pin, uint8_t data);
19: void sapio_pinset(void *selfdd, struct gpio_pin pin);
20: struct gpio_pin sapio_pinget(void *selfdd, uint32_t pin);
21:
22:
23: struct driver sapio_dr = {
24: sizeof(struct sapio_dd),
25: sapio_attach,
26: NULL,
27: NULL
28: };
29:
30:
31: int
32: sapio_attach(struct device *self, uint32_t loc, uint8_t flags)
33: {
34: struct sapio_dd *ddp = self->dv_devdata;
35: struct gpio_controller *gcp = &ddp->pio_gc;
36:
37: /* acquire bus_handle from parent */
38: ddp->pio_bhp = self->dv_parent->dv_aux;
39:
40: gcp->gc_pinread = sapio_pinread;
41: gcp->gc_pinwrite = sapio_pinwrite;
42: gcp->gc_pinset = sapio_pinset;
43: gcp->gc_pinget = sapio_pinget;
44: gcp->gc_npins = SAPIO_NPINS;
45: gcp->gc_selfdd = ddp;
46:
47: /* export gpio_controller */
48: self->dv_aux = gcp;
49:
50: printf("SAM7 Parallel Input/Output controller, %d pins\n", SAPIO_NPINS);
51:
52: return(0);
53: }
54:
55:
56: uint8_t
57: sapio_pinread(void *selfdd, uint32_t pin)
58: {
59: /* TODO */
60: return(0);
61: }
62:
63:
64: void
65: sapio_pinwrite(void *selfdd, uint32_t pin, uint8_t data)
66: {
67: /* TODO */
68: }
69:
70:
71: void
72: sapio_pinset(void *selfdd, struct gpio_pin pin)
73: {
74: struct sapio_dd *sdd = (struct sapio_dd *)selfdd;
75: /*
76: * Configure pin.
77: */
78:
79: /* see if this i/o line is correct for us */
80: if (sdd->pio_gc.gc_npins < (pin.gp_pinno + 1)) {
81: /* out of range */
82: printf("sapio_pinset: WARNING: pin no. %d doesn't present on this controller\n", pin.gp_pinno);
83:
84: return;
85: }
86:
87: /* PIO or Periph. ? */
88: if (pin.gp_pio == 0)
1.2 ! nbrk 89: bus_write_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_PDR, 1 << pin.gp_pinno);
1.1 nbrk 90: else
1.2 ! nbrk 91: bus_write_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_PER, 1 << pin.gp_pinno);
1.1 nbrk 92:
93: /* flags */
94: if (pin.gp_flags & GPIO_PIN_OUTPUT)
95: /* enable output */
1.2 ! nbrk 96: bus_write_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_OER, 1 << pin.gp_pinno);
1.1 nbrk 97: else
98: /* disable output */
1.2 ! nbrk 99: bus_write_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_ODR, 1 << pin.gp_pinno);
1.1 nbrk 100:
101: /* data */
102: if (pin.gp_value == 1)
1.2 ! nbrk 103: bus_write_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_SODR, 1 << pin.gp_pinno);
1.1 nbrk 104: else
1.2 ! nbrk 105: bus_write_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_CODR, 1 << pin.gp_pinno);
1.1 nbrk 106: }
107:
108:
109: struct gpio_pin
110: sapio_pinget(void *selfdd, uint32_t pin)
111: {
112: struct gpio_pin gp;
113: struct sapio_dd *sdd = (struct sapio_dd *)selfdd;
114: /*
115: * Get pin configuration.
116: */
117:
118: gp.gp_pinno = pin;
119:
120: /* see if this pin belongs to Peripherals (0) or to PIO (1) */
1.2 ! nbrk 121: gp.gp_pio = bus_read_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_PSR) & (1 << pin);
1.1 nbrk 122:
123: /* get state through Output Status Register */
1.2 ! nbrk 124: gp.gp_flags = (bus_read_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_OSR) & (1 << pin)) ?
1.1 nbrk 125: GPIO_PIN_INPUT | GPIO_PIN_OUTPUT : GPIO_PIN_INPUT; /* XXX how to determine input flag? */
126:
127: /* read value in Pin Data Status Register */
1.2 ! nbrk 128: gp.gp_value = bus_read_4(sdd->pio_bhp, (uint32_t)AT91C_PIOA_PDSR) & (1 << pin);
1.1 nbrk 129:
130: return(gp);
131: }
132:
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