File: [local] / funnyos / arch / sam7s64 / config.c (download)
Revision 1.20, Mon Jan 7 20:29:21 2008 UTC (16 years, 6 months ago) by nbrk
Branch: MAIN
CVS Tags: HEAD Changes since 1.19: +10 -3 lines
attach p64lcd at sapio/0;
attach h44780 at p64lcd/0;
turn on sdmmc at spisdmmc/0 for now..
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/*
* $Id: config.c,v 1.20 2008/01/07 20:29:21 nbrk Exp $
*/
#include <sys/types.h>
#include <sys/device.h>
#include <dev/cpuvar.h>
#include <arch/sam7s64/dev/at91sam7.h>
/*
* Configuration file for platform (AT91SAM7S64).
*/
/* device drivers */
extern struct driver root_dr;
extern struct driver cpu_dr;
extern struct driver saapbus_dr;
extern struct driver sapio_dr;
extern struct driver gpioled_dr;
extern struct driver saaic_dr;
extern struct driver sartt_dr;
extern struct driver gpiobtn_dr;
extern struct driver saspi_dr;
extern struct driver spisdmmc_dr;
extern struct driver sdmmc_dr;
extern struct driver gpio7seg_dr;
extern struct driver p64lcd_dr;
extern struct driver h44780_dr;
extern void (*putchar)(char);
extern void sausart_early_putchar(char ch);
/* amount of physical memory, in Bytes */
uint32_t physmem = 16384 /* 16KB :) */;
/*
* Where to attach each device.
*/
struct attachinfo config_attachinfo[] = {
/* child, parent, pminor, loc, intrno, flags */
{ "cpu" , "root", 0, 0, -1, 0 },
{ "saapbus","root", 0, 0, -1, 0 },
{ "sapio", "saapbus", 0, 0, -1, 0 },
{ "gpioled","sapio", 0, 17, -1, 0 },
{ "gpioled","sapio", 0, 18, -1, 0 },
{ "gpiobtn","sapio", 0, 19, 0, 0 /*controls gpioled/0*/},
{ "gpiobtn","sapio", 0, 20, 30, 0 /*controls gpioled/1*/},
{ "gpio7seg","sapio", 0, 0, -1, 0 },
{ "p64lcd", "sapio", 0, 0, -1, 0 },
{ "h44780", "p64lcd", 0, 0, -1, 0 },
// { "sartt", "saapbus", 0, 0, 1, 0 },
{ "saspi", "saapbus", 0, 0, 0, 0 },
{ "spisdmmc","saspi", 0, 0, 0, 0 },
{ "sdmmc", "spisdmmc", 0, 0, 0, 0 },
// { "saaic", "saapbus", 0, 0, -1, 0 },
{ NULL, NULL, 0, 0, -1, 0 }
};
/*
* Link device names with their drivers.
*/
struct driverinfo config_driverinfo[] = {
/* name, driverp, ninstances (should be -1) */
{ "root", &root_dr, -1 },
{ "cpu" , &cpu_dr, -1 },
{ "saapbus" , &saapbus_dr, -1 },
{ "sapio", &sapio_dr, -1 },
{ "gpioled", &gpioled_dr, -1 },
{ "saaic", &saaic_dr, -1 },
{ "sartt", &sartt_dr, -1 },
{ "gpiobtn", &gpiobtn_dr, -1 },
{ "saspi", &saspi_dr, -1 },
{ "spisdmmc", &spisdmmc_dr, -1 },
{ "sdmmc", &sdmmc_dr, -1 },
{ "gpio7seg", &gpio7seg_dr, -1 },
{ "p64lcd", &p64lcd_dr, -1 },
{ "h44780", &h44780_dr, -1 },
{ NULL, NULL, 0 }
};
/*
* Machine early-stage initialization hooks.
*/
void
config_machineinit(void)
{
/*
* Initialize critical devices at startup.
*/
__cpu_disable_irq();
/* disable watchdog */
*AT91C_WDTC_WDMR = AT91C_WDTC_WDDIS;
/* set FLASH to high-speed */
*AT91C_MC_FMR = AT91C_MC_FWS_0FWS;
/* enable user RESET (magic button on board) */
*AT91C_RSTC_RMR = AT91C_RSTC_URSTEN | AT91C_RSTC_KEY;
/*
* Initialize oscillators.
* Taken from Atmel's examples.
*/
/* Set MCK at 48 054 850 */
/* 1 Enabling the Main Oscillator */
/* SCK = 1/32768 = 30.51 uSecond
* Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
*/
*AT91C_PMC_MOR = ( (AT91C_CKGR_OSCOUNT & (0x06 <<8)) | AT91C_CKGR_MOSCEN);
/* Wait the startup time */
while(!(*AT91C_PMC_SR & AT91C_PMC_MOSCS))
;
/* 2 Checking the Main Oscillator Frequency (Optional) */
/* TODO */
/* 3 Setting PLL and divider: */
/* - div by 14 Fin = 1.3165 =(18,432 / 14)
* - Mul 72+1: Fout = 96.1097 =(3,6864 *73)
* for 96 MHz the erroe is 0.11%
* Field out NOT USED = 0
* PLLCOUNT pll startup time estimate at : 0.844 ms
* PLLCOUNT 28 = 0.000844 /(1/32768)
*/
*AT91C_PMC_PLLR = ( (AT91C_CKGR_DIV & 14 ) |
(AT91C_CKGR_PLLCOUNT & (28<<8)) |
(AT91C_CKGR_MUL & (72<<16)) );
/* Wait the startup time */
while(!(*AT91C_PMC_SR & AT91C_PMC_LOCK))
;
while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
;
/* 4. Selection of Master Clock and Processor Clock */
/* select the PLL clock divided by 2: */
*AT91C_PMC_MCKR = AT91C_PMC_PRES_CLK_2;
while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
;
*AT91C_PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
;
/* enable clock to all modules */
*AT91C_PMC_PCER = AT91C_ALL_INT;
/* initialize USART0 (we clock it in PMC above) */
*AT91C_PIOA_PDR = AT91C_PA21_RXD1 | /* Enable RxD0 Pin */
AT91C_PA22_TXD1; /* Enalbe TxD0 Pin */
*AT91C_US1_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */
AT91C_US_CLKS_CLOCK | /* Clock = MCK */
AT91C_US_CHRL_8_BITS | /* 8-bit Data */
AT91C_US_PAR_NONE | /* No Parity */
AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */
*AT91C_US1_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */
/* enable DMA transfers on USART0 */
*AT91C_US1_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
*AT91C_US1_CR = AT91C_US_RXEN | /* Receiver Enable */
AT91C_US_TXEN; /* Transmitter Enable */
/* redefine putchar */
putchar = sausart_early_putchar;
}