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Annotation of funnyos/arch/sam7s64/config.c, Revision 1.7

1.1       init        1: /*
1.7     ! nbrk        2:  * $Id: config.c,v 1.6 2007/11/15 20:40:12 nbrk Exp $
1.1       init        3:  */
                      4: #include <sys/types.h>
                      5: #include <sys/device.h>
                      6:
1.4       nbrk        7: /* devices' regs that we will touch in config_machineinit() */
                      8: #include <arch/sam7s64/dev/sapmcreg.h>
1.5       nbrk        9: #include <arch/sam7s64/dev/sawdtreg.h>
                     10: #include <arch/sam7s64/dev/sapioreg.h>
                     11: #include <arch/sam7s64/dev/sausartreg.h>
1.4       nbrk       12:
1.1       init       13: /*
                     14:  * Configuration file for platform (AT91SAM7S64).
                     15:  */
                     16:
                     17: /* device drivers */
                     18: extern struct driver root_dr;
                     19: extern struct driver cpu_dr;
1.3       init       20: extern struct driver saapbus_dr;
1.7     ! nbrk       21: extern struct driver sapio_dr;
1.1       init       22:
                     23:
                     24: extern void(*putchar)(char);
1.2       init       25: void   sauart_early_putc(char ch);
1.1       init       26:
                     27: /* amount of physical memory, in Bytes */
1.5       nbrk       28: uint32_t physmem = 16384 /* 16KB :) */;
1.1       init       29:
                     30: /*
                     31:  * Where to attach each device.
                     32:  */
                     33: struct attachinfo config_attachinfo[] = {
                     34:        /* child,   parent, pminor, loc,        intrno, flags */
                     35:        { "cpu" ,       "root",         0, 0,                   0,      0 },
1.3       init       36:        { "saapbus","root",     0, 0,                   0,      0 },
1.7     ! nbrk       37:        { "sapio",  "saapbus",  0, 0,                   0,  0 },
1.1       init       38:        { NULL,         NULL,           0, 0,                   0,  0 }
                     39: };
                     40:
                     41:
                     42: /*
                     43:  * Link device names with their drivers.
                     44:  */
                     45: struct driverinfo config_driverinfo[] = {
                     46: /* name, driverp, ninstances (should be -1) */
                     47:        { "root", &root_dr, -1 },
                     48:        { "cpu" , &cpu_dr, -1 },
1.3       init       49:        { "saapbus" , &saapbus_dr, -1 },
1.7     ! nbrk       50:        { "sapio", &sapio_dr, -1 },
1.1       init       51:        { NULL, NULL, 0 }
                     52: };
                     53:
                     54:
                     55: /*
                     56:  * Machine early-stage initialization hooks.
                     57:  */
                     58:
                     59: void
1.4       nbrk       60: config_machineinit(void)
1.1       init       61: {
                     62:        /*
1.4       nbrk       63:         * Initialize critical devices at startup.
1.1       init       64:         */
1.4       nbrk       65:
1.5       nbrk       66:        /* XXX kill all magic here */
1.4       nbrk       67:
1.5       nbrk       68:        /* disable watchdog */
1.6       nbrk       69:        *(uint32_t *)(SAWDT_BASE + SAWDT_WDT_MR) |= 0x00001000; /* WDDIS */;
1.4       nbrk       70:
1.5       nbrk       71:        /* "Start up time = 8 * OSCOUNT / SLCK" (slow clock cycles) */
1.6       nbrk       72:        *(uint32_t *)(SAPMC_BASE + SAPMC_CKGR_MOR) = 0x00000701;
1.4       nbrk       73:        /* wait main osc. to stabilize.. */
1.6       nbrk       74:        while (! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000001)
1.4       nbrk       75:                ;
                     76:
1.5       nbrk       77:        /* set PLL */
1.6       nbrk       78:        *(uint32_t *)(SAPMC_BASE + SAPMC_CKGR_PLLR) = 0x00040805;
1.5       nbrk       79:        /* wait.. */
1.6       nbrk       80:        while(! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000004)
1.5       nbrk       81:                ;
1.6       nbrk       82:        while(! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000008 /* MCKRDY */)
1.5       nbrk       83:                ;
                     84:
                     85:        /* select Master Clock and Processor Clock; select (PLL clock / 2) */
1.6       nbrk       86:        *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_MCKR) = 0x00000003 /* PLL in CSS */ | 0x00000004 /* presc. = 2 */;
1.5       nbrk       87:        /* wait.. */
1.6       nbrk       88:        while(! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000008)
1.5       nbrk       89:                ;
                     90:
                     91:        /*
1.6       nbrk       92:         * Enable clock to PIO.
                     93:         */
                     94:        *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_PCER) = 0x00000002; /* 2 is ID of PIOA */
                     95:
                     96:        /*
1.5       nbrk       97:         * Initialize USART0.
                     98:         */
                     99:        /* disable PIO from controlling RXD0/TXD0 pins (USART0 at Periph. A) */
1.6       nbrk      100:        *(uint32_t *)(SAPIO_BASE + SAPIO_PIO_PDR) = 0x00000030; /* PIN5 | PIN6 */
1.5       nbrk      101:        /* select this pins in Peripheral A */
1.6       nbrk      102:        *(uint32_t *)(SAPIO_BASE + SAPIO_PIO_ASR) = 0x00000030; /* now, RXD0 | TXD0 */
1.5       nbrk      103:
                    104:        /* enable clock to USART0 */
1.6       nbrk      105:        *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_PCER) = 0x00000006; /* 6 is ID of USART0 */
1.5       nbrk      106:
                    107:        /* set baud rate */
1.6       nbrk      108:        *(uint32_t *)(SAUSART_0_BASE + SAUSART_US_BRGR) = 313; /* XXX (48000000 / 9600 * 16) */
1.5       nbrk      109:
                    110:        /* select usart mode */
1.6       nbrk      111:        *(uint32_t *)(SAUSART_0_BASE + SAUSART_US_MR) = 0x000008c0; /* XXX eleminate magic */
1.5       nbrk      112:
                    113:        /* TODO enable DMA transfers for TX/RX in PDC */
                    114:
                    115:        /* enable transmitter/receiver */
1.6       nbrk      116:        *(uint32_t *)(SAUSART_0_BASE + SAUSART_US_CR) = 0x00000050; /* TXEN | RXEN */
1.5       nbrk      117:
                    118:        /* TODO redefine putchar */
                    119:        //putchar = sausart_0_putchar;
1.1       init      120: }
                    121:
                    122: