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Annotation of funnyos/arch/sam7s64/config.c, Revision 1.6

1.1       init        1: /*
1.6     ! nbrk        2:  * $Id: config.c,v 1.5 2007/11/13 22:40:33 nbrk Exp $
1.1       init        3:  */
                      4: #include <sys/types.h>
                      5: #include <sys/device.h>
                      6:
1.4       nbrk        7: /* devices' regs that we will touch in config_machineinit() */
                      8: #include <arch/sam7s64/dev/sapmcreg.h>
1.5       nbrk        9: #include <arch/sam7s64/dev/sawdtreg.h>
                     10: #include <arch/sam7s64/dev/sapioreg.h>
                     11: #include <arch/sam7s64/dev/sausartreg.h>
1.4       nbrk       12:
1.1       init       13: /*
                     14:  * Configuration file for platform (AT91SAM7S64).
                     15:  */
                     16:
                     17: /* device drivers */
                     18: extern struct driver root_dr;
                     19: extern struct driver cpu_dr;
1.3       init       20: extern struct driver saapbus_dr;
1.1       init       21:
                     22:
                     23: extern void(*putchar)(char);
1.2       init       24: void   sauart_early_putc(char ch);
1.1       init       25:
                     26: /* amount of physical memory, in Bytes */
1.5       nbrk       27: uint32_t physmem = 16384 /* 16KB :) */;
1.1       init       28:
                     29: /*
                     30:  * Where to attach each device.
                     31:  */
                     32: struct attachinfo config_attachinfo[] = {
                     33:        /* child,   parent, pminor, loc,        intrno, flags */
                     34:        { "cpu" ,       "root",         0, 0,                   0,      0 },
1.3       init       35:        { "saapbus","root",     0, 0,                   0,      0 },
1.1       init       36:        { NULL,         NULL,           0, 0,                   0,  0 }
                     37: };
                     38:
                     39:
                     40: /*
                     41:  * Link device names with their drivers.
                     42:  */
                     43: struct driverinfo config_driverinfo[] = {
                     44: /* name, driverp, ninstances (should be -1) */
                     45:        { "root", &root_dr, -1 },
                     46:        { "cpu" , &cpu_dr, -1 },
1.3       init       47:        { "saapbus" , &saapbus_dr, -1 },
1.1       init       48:        { NULL, NULL, 0 }
                     49: };
                     50:
                     51:
                     52: /*
                     53:  * Machine early-stage initialization hooks.
                     54:  */
                     55:
                     56: void
1.4       nbrk       57: config_machineinit(void)
1.1       init       58: {
                     59:        /*
1.4       nbrk       60:         * Initialize critical devices at startup.
1.1       init       61:         */
1.4       nbrk       62:
1.5       nbrk       63:        /* XXX kill all magic here */
1.4       nbrk       64:
1.5       nbrk       65:        /* disable watchdog */
1.6     ! nbrk       66:        *(uint32_t *)(SAWDT_BASE + SAWDT_WDT_MR) |= 0x00001000; /* WDDIS */;
1.4       nbrk       67:
1.5       nbrk       68:        /* "Start up time = 8 * OSCOUNT / SLCK" (slow clock cycles) */
1.6     ! nbrk       69:        *(uint32_t *)(SAPMC_BASE + SAPMC_CKGR_MOR) = 0x00000701;
1.4       nbrk       70:        /* wait main osc. to stabilize.. */
1.6     ! nbrk       71:        while (! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000001)
1.4       nbrk       72:                ;
                     73:
1.5       nbrk       74:        /* set PLL */
1.6     ! nbrk       75:        *(uint32_t *)(SAPMC_BASE + SAPMC_CKGR_PLLR) = 0x00040805;
1.5       nbrk       76:        /* wait.. */
1.6     ! nbrk       77:        while(! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000004)
1.5       nbrk       78:                ;
1.6     ! nbrk       79:        while(! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000008 /* MCKRDY */)
1.5       nbrk       80:                ;
                     81:
                     82:        /* select Master Clock and Processor Clock; select (PLL clock / 2) */
1.6     ! nbrk       83:        *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_MCKR) = 0x00000003 /* PLL in CSS */ | 0x00000004 /* presc. = 2 */;
1.5       nbrk       84:        /* wait.. */
1.6     ! nbrk       85:        while(! *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_SR) & 0x00000008)
1.5       nbrk       86:                ;
                     87:
                     88:        /*
1.6     ! nbrk       89:         * Enable clock to PIO.
        !            90:         */
        !            91:        *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_PCER) = 0x00000002; /* 2 is ID of PIOA */
        !            92:
        !            93:        /*
1.5       nbrk       94:         * Initialize USART0.
                     95:         */
                     96:        /* disable PIO from controlling RXD0/TXD0 pins (USART0 at Periph. A) */
1.6     ! nbrk       97:        *(uint32_t *)(SAPIO_BASE + SAPIO_PIO_PDR) = 0x00000030; /* PIN5 | PIN6 */
1.5       nbrk       98:        /* select this pins in Peripheral A */
1.6     ! nbrk       99:        *(uint32_t *)(SAPIO_BASE + SAPIO_PIO_ASR) = 0x00000030; /* now, RXD0 | TXD0 */
1.5       nbrk      100:
                    101:        /* enable clock to USART0 */
1.6     ! nbrk      102:        *(uint32_t *)(SAPMC_BASE + SAPMC_PMC_PCER) = 0x00000006; /* 6 is ID of USART0 */
1.5       nbrk      103:
                    104:        /* set baud rate */
1.6     ! nbrk      105:        *(uint32_t *)(SAUSART_0_BASE + SAUSART_US_BRGR) = 313; /* XXX (48000000 / 9600 * 16) */
1.5       nbrk      106:
                    107:        /* select usart mode */
1.6     ! nbrk      108:        *(uint32_t *)(SAUSART_0_BASE + SAUSART_US_MR) = 0x000008c0; /* XXX eleminate magic */
1.5       nbrk      109:
                    110:        /* TODO enable DMA transfers for TX/RX in PDC */
                    111:
                    112:        /* enable transmitter/receiver */
1.6     ! nbrk      113:        *(uint32_t *)(SAUSART_0_BASE + SAUSART_US_CR) = 0x00000050; /* TXEN | RXEN */
1.5       nbrk      114:
                    115:        /* TODO redefine putchar */
                    116:        //putchar = sausart_0_putchar;
1.1       init      117: }
                    118:
                    119: