Annotation of funnyos/arch/sam7s64/config.c, Revision 1.17
1.1 init 1: /*
1.17 ! nbrk 2: * $Id: config.c,v 1.16 2007/12/21 17:41:27 nbrk Exp $
1.1 init 3: */
4: #include <sys/types.h>
5: #include <sys/device.h>
6:
1.9 nbrk 7: #include <dev/cpuvar.h>
8: #include <arch/sam7s64/dev/at91sam7.h>
1.4 nbrk 9:
1.1 init 10: /*
11: * Configuration file for platform (AT91SAM7S64).
12: */
13:
14: /* device drivers */
15: extern struct driver root_dr;
16: extern struct driver cpu_dr;
1.3 init 17: extern struct driver saapbus_dr;
1.7 nbrk 18: extern struct driver sapio_dr;
1.8 nbrk 19: extern struct driver gpioled_dr;
1.13 nbrk 20: extern struct driver saaic_dr;
21: extern struct driver sartt_dr;
1.14 nbrk 22: extern struct driver gpiobtn_dr;
1.15 nbrk 23: extern struct driver saspi_dr;
1.16 nbrk 24: extern struct driver spisdmmc_dr;
1.17 ! nbrk 25: extern struct driver sdmmc_dr;
1.1 init 26:
1.9 nbrk 27: extern void (*putchar)(char);
1.10 nbrk 28: extern void sausart_early_putchar(char ch);
1.1 init 29:
30: /* amount of physical memory, in Bytes */
1.5 nbrk 31: uint32_t physmem = 16384 /* 16KB :) */;
1.1 init 32:
33: /*
34: * Where to attach each device.
35: */
36: struct attachinfo config_attachinfo[] = {
37: /* child, parent, pminor, loc, intrno, flags */
1.14 nbrk 38: { "cpu" , "root", 0, 0, -1, 0 },
39: { "saapbus","root", 0, 0, -1, 0 },
40: { "sapio", "saapbus", 0, 0, -1, 0 },
41: { "gpioled","sapio", 0, 17, -1, 0 },
42: { "gpioled","sapio", 0, 18, -1, 0 },
43: { "gpiobtn","sapio", 0, 19, 0, 0 /*controls gpioled/0*/},
44: { "gpiobtn","sapio", 0, 20, 30, 0 /*controls gpioled/1*/},
45: // { "sartt", "saapbus", 0, 0, 1, 0 },
1.15 nbrk 46: { "saspi", "saapbus", 0, 0, 0, 0 },
1.16 nbrk 47: { "spisdmmc","saspi", 0, 0, 0, 0 },
1.17 ! nbrk 48: { "sdmmc", "spisdmmc", 0, 0, 0, 0 },
1.15 nbrk 49: // { "saaic", "saapbus", 0, 0, -1, 0 },
1.14 nbrk 50: { NULL, NULL, 0, 0, -1, 0 }
1.1 init 51: };
52:
53:
54: /*
55: * Link device names with their drivers.
56: */
57: struct driverinfo config_driverinfo[] = {
58: /* name, driverp, ninstances (should be -1) */
59: { "root", &root_dr, -1 },
60: { "cpu" , &cpu_dr, -1 },
1.3 init 61: { "saapbus" , &saapbus_dr, -1 },
1.7 nbrk 62: { "sapio", &sapio_dr, -1 },
1.8 nbrk 63: { "gpioled", &gpioled_dr, -1 },
1.13 nbrk 64: { "saaic", &saaic_dr, -1 },
65: { "sartt", &sartt_dr, -1 },
1.15 nbrk 66: { "gpiobtn", &gpiobtn_dr, -1 },
67: { "saspi", &saspi_dr, -1 },
1.16 nbrk 68: { "spisdmmc", &spisdmmc_dr, -1 },
1.17 ! nbrk 69: { "sdmmc", &sdmmc_dr, -1 },
1.1 init 70: { NULL, NULL, 0 }
71: };
72:
73:
74: /*
75: * Machine early-stage initialization hooks.
76: */
77:
78: void
1.4 nbrk 79: config_machineinit(void)
1.1 init 80: {
81: /*
1.4 nbrk 82: * Initialize critical devices at startup.
1.1 init 83: */
1.9 nbrk 84: __cpu_disable_irq();
1.4 nbrk 85:
1.5 nbrk 86: /* disable watchdog */
1.9 nbrk 87: *AT91C_WDTC_WDMR = AT91C_WDTC_WDDIS;
1.5 nbrk 88:
1.9 nbrk 89: /* set FLASH to high-speed */
90: *AT91C_MC_FMR = AT91C_MC_FWS_0FWS;
1.5 nbrk 91:
1.11 nbrk 92: /* enable user RESET (magic button on board) */
93: *AT91C_RSTC_RMR = AT91C_RSTC_URSTEN | AT91C_RSTC_KEY;
94:
1.5 nbrk 95: /*
1.9 nbrk 96: * Initialize oscillators.
97: * Taken from Atmel's examples.
1.6 nbrk 98: */
1.9 nbrk 99: /* Set MCK at 48 054 850 */
1.6 nbrk 100:
1.9 nbrk 101: /* 1 Enabling the Main Oscillator */
102: /* SCK = 1/32768 = 30.51 uSecond
103: * Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
1.5 nbrk 104: */
1.9 nbrk 105: *AT91C_PMC_MOR = ( (AT91C_CKGR_OSCOUNT & (0x06 <<8)) | AT91C_CKGR_MOSCEN);
1.5 nbrk 106:
1.9 nbrk 107: /* Wait the startup time */
108: while(!(*AT91C_PMC_SR & AT91C_PMC_MOSCS))
109: ;
1.5 nbrk 110:
1.9 nbrk 111: /* 2 Checking the Main Oscillator Frequency (Optional) */
112: /* TODO */
1.5 nbrk 113:
1.9 nbrk 114: /* 3 Setting PLL and divider: */
115: /* - div by 14 Fin = 1.3165 =(18,432 / 14)
116: * - Mul 72+1: Fout = 96.1097 =(3,6864 *73)
117: * for 96 MHz the erroe is 0.11%
118: * Field out NOT USED = 0
119: * PLLCOUNT pll startup time estimate at : 0.844 ms
120: * PLLCOUNT 28 = 0.000844 /(1/32768)
121: */
122: *AT91C_PMC_PLLR = ( (AT91C_CKGR_DIV & 14 ) |
123: (AT91C_CKGR_PLLCOUNT & (28<<8)) |
124: (AT91C_CKGR_MUL & (72<<16)) );
1.5 nbrk 125:
1.9 nbrk 126: /* Wait the startup time */
127: while(!(*AT91C_PMC_SR & AT91C_PMC_LOCK))
128: ;
129: while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
130: ;
1.5 nbrk 131:
1.9 nbrk 132: /* 4. Selection of Master Clock and Processor Clock */
133: /* select the PLL clock divided by 2: */
134: *AT91C_PMC_MCKR = AT91C_PMC_PRES_CLK_2;
135: while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
136: ;
137:
138: *AT91C_PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
139: while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
140: ;
1.5 nbrk 141:
1.12 nbrk 142: /* enable clock to all modules */
1.11 nbrk 143: *AT91C_PMC_PCER = AT91C_ALL_INT;
1.9 nbrk 144:
145: /* initialize USART0 (we clock it in PMC above) */
146:
147: *AT91C_PIOA_PDR = AT91C_PA5_RXD0 | /* Enable RxD0 Pin */
148: AT91C_PA6_TXD0; /* Enalbe TxD0 Pin */
149:
150: *AT91C_US0_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */
151: AT91C_US_CLKS_CLOCK | /* Clock = MCK */
152: AT91C_US_CHRL_8_BITS | /* 8-bit Data */
153: AT91C_US_PAR_NONE | /* No Parity */
154: AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */
155:
156: *AT91C_US0_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */
157:
1.10 nbrk 158: /* enable DMA transfers on USART0 */
159: *AT91C_US0_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
160:
1.9 nbrk 161: *AT91C_US0_CR = AT91C_US_RXEN | /* Receiver Enable */
162: AT91C_US_TXEN; /* Transmitter Enable */
163:
164: /* redefine putchar */
1.10 nbrk 165: putchar = sausart_early_putchar;
1.1 init 166: }
167:
168:
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