Annotation of funnyos/arch/sam7s64/config.c, Revision 1.14
1.1 init 1: /*
1.14 ! nbrk 2: * $Id: config.c,v 1.13 2007/11/24 20:52:29 nbrk Exp $
1.1 init 3: */
4: #include <sys/types.h>
5: #include <sys/device.h>
6:
1.9 nbrk 7: #include <dev/cpuvar.h>
8: #include <arch/sam7s64/dev/at91sam7.h>
1.4 nbrk 9:
1.1 init 10: /*
11: * Configuration file for platform (AT91SAM7S64).
12: */
13:
14: /* device drivers */
15: extern struct driver root_dr;
16: extern struct driver cpu_dr;
1.3 init 17: extern struct driver saapbus_dr;
1.7 nbrk 18: extern struct driver sapio_dr;
1.8 nbrk 19: extern struct driver gpioled_dr;
1.13 nbrk 20: extern struct driver saaic_dr;
21: extern struct driver sartt_dr;
1.14 ! nbrk 22: extern struct driver gpiobtn_dr;
1.1 init 23:
24:
1.9 nbrk 25: extern void (*putchar)(char);
1.10 nbrk 26: extern void sausart_early_putchar(char ch);
1.1 init 27:
28: /* amount of physical memory, in Bytes */
1.5 nbrk 29: uint32_t physmem = 16384 /* 16KB :) */;
1.1 init 30:
31: /*
32: * Where to attach each device.
33: */
34: struct attachinfo config_attachinfo[] = {
35: /* child, parent, pminor, loc, intrno, flags */
1.14 ! nbrk 36: { "cpu" , "root", 0, 0, -1, 0 },
! 37: { "saapbus","root", 0, 0, -1, 0 },
! 38: { "sapio", "saapbus", 0, 0, -1, 0 },
! 39: { "gpioled","sapio", 0, 17, -1, 0 },
! 40: { "gpioled","sapio", 0, 18, -1, 0 },
! 41: { "gpiobtn","sapio", 0, 19, 0, 0 /*controls gpioled/0*/},
! 42: { "gpiobtn","sapio", 0, 20, 30, 0 /*controls gpioled/1*/},
! 43: // { "sartt", "saapbus", 0, 0, 1, 0 },
! 44: { "saaic", "saapbus", 0, 0, -1, 0 },
! 45: { NULL, NULL, 0, 0, -1, 0 }
1.1 init 46: };
47:
48:
49: /*
50: * Link device names with their drivers.
51: */
52: struct driverinfo config_driverinfo[] = {
53: /* name, driverp, ninstances (should be -1) */
54: { "root", &root_dr, -1 },
55: { "cpu" , &cpu_dr, -1 },
1.3 init 56: { "saapbus" , &saapbus_dr, -1 },
1.7 nbrk 57: { "sapio", &sapio_dr, -1 },
1.8 nbrk 58: { "gpioled", &gpioled_dr, -1 },
1.13 nbrk 59: { "saaic", &saaic_dr, -1 },
60: { "sartt", &sartt_dr, -1 },
1.14 ! nbrk 61: { "gpiobtn", &gpiobtn_dr, -1 },
1.1 init 62: { NULL, NULL, 0 }
63: };
64:
65:
66: /*
67: * Machine early-stage initialization hooks.
68: */
69:
70: void
1.4 nbrk 71: config_machineinit(void)
1.1 init 72: {
73: /*
1.4 nbrk 74: * Initialize critical devices at startup.
1.1 init 75: */
1.9 nbrk 76: __cpu_disable_irq();
1.4 nbrk 77:
1.5 nbrk 78: /* disable watchdog */
1.9 nbrk 79: *AT91C_WDTC_WDMR = AT91C_WDTC_WDDIS;
1.5 nbrk 80:
1.9 nbrk 81: /* set FLASH to high-speed */
82: *AT91C_MC_FMR = AT91C_MC_FWS_0FWS;
1.5 nbrk 83:
1.11 nbrk 84: /* enable user RESET (magic button on board) */
85: *AT91C_RSTC_RMR = AT91C_RSTC_URSTEN | AT91C_RSTC_KEY;
86:
1.5 nbrk 87: /*
1.9 nbrk 88: * Initialize oscillators.
89: * Taken from Atmel's examples.
1.6 nbrk 90: */
1.9 nbrk 91: /* Set MCK at 48 054 850 */
1.6 nbrk 92:
1.9 nbrk 93: /* 1 Enabling the Main Oscillator */
94: /* SCK = 1/32768 = 30.51 uSecond
95: * Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms
1.5 nbrk 96: */
1.9 nbrk 97: *AT91C_PMC_MOR = ( (AT91C_CKGR_OSCOUNT & (0x06 <<8)) | AT91C_CKGR_MOSCEN);
1.5 nbrk 98:
1.9 nbrk 99: /* Wait the startup time */
100: while(!(*AT91C_PMC_SR & AT91C_PMC_MOSCS))
101: ;
1.5 nbrk 102:
1.9 nbrk 103: /* 2 Checking the Main Oscillator Frequency (Optional) */
104: /* TODO */
1.5 nbrk 105:
1.9 nbrk 106: /* 3 Setting PLL and divider: */
107: /* - div by 14 Fin = 1.3165 =(18,432 / 14)
108: * - Mul 72+1: Fout = 96.1097 =(3,6864 *73)
109: * for 96 MHz the erroe is 0.11%
110: * Field out NOT USED = 0
111: * PLLCOUNT pll startup time estimate at : 0.844 ms
112: * PLLCOUNT 28 = 0.000844 /(1/32768)
113: */
114: *AT91C_PMC_PLLR = ( (AT91C_CKGR_DIV & 14 ) |
115: (AT91C_CKGR_PLLCOUNT & (28<<8)) |
116: (AT91C_CKGR_MUL & (72<<16)) );
1.5 nbrk 117:
1.9 nbrk 118: /* Wait the startup time */
119: while(!(*AT91C_PMC_SR & AT91C_PMC_LOCK))
120: ;
121: while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
122: ;
1.5 nbrk 123:
1.9 nbrk 124: /* 4. Selection of Master Clock and Processor Clock */
125: /* select the PLL clock divided by 2: */
126: *AT91C_PMC_MCKR = AT91C_PMC_PRES_CLK_2;
127: while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
128: ;
129:
130: *AT91C_PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
131: while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
132: ;
1.5 nbrk 133:
1.12 nbrk 134: /* enable clock to all modules */
1.11 nbrk 135: *AT91C_PMC_PCER = AT91C_ALL_INT;
1.9 nbrk 136:
137: /* initialize USART0 (we clock it in PMC above) */
138:
139: *AT91C_PIOA_PDR = AT91C_PA5_RXD0 | /* Enable RxD0 Pin */
140: AT91C_PA6_TXD0; /* Enalbe TxD0 Pin */
141:
142: *AT91C_US0_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */
143: AT91C_US_CLKS_CLOCK | /* Clock = MCK */
144: AT91C_US_CHRL_8_BITS | /* 8-bit Data */
145: AT91C_US_PAR_NONE | /* No Parity */
146: AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */
147:
148: *AT91C_US0_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */
149:
1.10 nbrk 150: /* enable DMA transfers on USART0 */
151: *AT91C_US0_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
152:
1.9 nbrk 153: *AT91C_US0_CR = AT91C_US_RXEN | /* Receiver Enable */
154: AT91C_US_TXEN; /* Transmitter Enable */
155:
156: /* redefine putchar */
1.10 nbrk 157: putchar = sausart_early_putchar;
1.1 init 158: }
159:
160:
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to config.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / funnyos / arch / sam7s64