===================================================================
RCS file: /cvs/funnyos/arch/sam7s64/config.c,v
retrieving revision 1.9
retrieving revision 1.13
diff -u -r1.9 -r1.13
--- funnyos/arch/sam7s64/config.c	2007/11/24 10:12:44	1.9
+++ funnyos/arch/sam7s64/config.c	2007/11/24 20:52:29	1.13
@@ -1,5 +1,5 @@
 /*
- * $Id: config.c,v 1.9 2007/11/24 10:12:44 nbrk Exp $
+ * $Id: config.c,v 1.13 2007/11/24 20:52:29 nbrk Exp $
  */
 #include <sys/types.h>
 #include <sys/device.h>
@@ -17,10 +17,12 @@
 extern struct driver saapbus_dr;
 extern struct driver sapio_dr;
 extern struct driver gpioled_dr;
+extern struct driver saaic_dr;
+extern struct driver sartt_dr;
 
 
 extern void 	(*putchar)(char);
-extern void 	sausart_0_putchar(char ch);
+extern void 	sausart_early_putchar(char ch);
 
 /* amount of physical memory, in Bytes */
 uint32_t physmem = 16384 /* 16KB :) */;
@@ -35,6 +37,8 @@
 	{ "sapio",  "saapbus", 	0, 0, 			0,  0 },
 	{ "gpioled","sapio", 	0, 17, 			0, 	0 },
 	{ "gpioled","sapio", 	0, 18, 			0, 	0 },
+	{ "sartt",  "saapbus", 	0, 0, 			1,  0 },
+	{ "saaic",  "saapbus",  0, 0, 			0,  0 },
 	{ NULL, 	NULL, 		0, 0, 			0,  0 }
 };
 
@@ -49,6 +53,8 @@
 	{ "saapbus" , &saapbus_dr, -1 },
 	{ "sapio", &sapio_dr, -1 },
 	{ "gpioled", &gpioled_dr, -1 },
+	{ "saaic", &saaic_dr, -1 },
+	{ "sartt", &sartt_dr, -1 },
 	{ NULL, NULL, 0 }
 };
 
@@ -71,6 +77,9 @@
 	/* set FLASH to high-speed */
 	*AT91C_MC_FMR = AT91C_MC_FWS_0FWS;
 
+	/* enable user RESET (magic button on board) */
+	*AT91C_RSTC_RMR = AT91C_RSTC_URSTEN | AT91C_RSTC_KEY;
+
 	/*
 	 * Initialize oscillators.
 	 * Taken from Atmel's examples.
@@ -118,23 +127,14 @@
 	while(!(*AT91C_PMC_SR & AT91C_PMC_MCKRDY))
 		;
 
-	/* enable clock to PIO and USART0 */
-	*AT91C_PMC_PCER = AT91C_ID_PIOA | AT91C_ID_US0 AT91C_ID_PDC;
+	/* enable clock to all modules */
+	*AT91C_PMC_PCER = AT91C_ALL_INT;
 	 
-	*AT91C_PIOA_PER = (1 << 17 | 1 << 18);
-	*AT91C_PIOA_OER = (1 << 17 | 1 << 18);
-	*AT91C_PIOA_CODR= (1 << 17 | 1 << 18);
-
 	/* initialize USART0 (we clock it in PMC above) */
 
   *AT91C_PIOA_PDR = AT91C_PA5_RXD0 |        /* Enable RxD0 Pin */
                     AT91C_PA6_TXD0;         /* Enalbe TxD0 Pin */
 
-  *AT91C_US0_CR = AT91C_US_RSTRX |          /* Reset Receiver      */
-                  AT91C_US_RSTTX |          /* Reset Transmitter   */
-                  AT91C_US_RXDIS |          /* Receiver Disable    */
-                  AT91C_US_TXDIS;           /* Transmitter Disable */
-
   *AT91C_US0_MR = AT91C_US_USMODE_NORMAL |  /* Normal Mode */
                   AT91C_US_CLKS_CLOCK    |  /* Clock = MCK */
                   AT91C_US_CHRL_8_BITS   |  /* 8-bit Data  */
@@ -143,14 +143,14 @@
 
   *AT91C_US0_BRGR = 48054857 / 16 / 9600;                    /* Baud Rate Divisor */
 
+  /* enable DMA transfers on USART0 */
+  *AT91C_US0_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN;
+
   *AT91C_US0_CR = AT91C_US_RXEN  |          /* Receiver Enable     */
                   AT91C_US_TXEN;            /* Transmitter Enable  */
 
 	/* redefine putchar */
-	putchar = sausart_0_putchar;
-//	putchar(0);
-//	putchar(0x46);
-//	putchar(0x46);
+	putchar = sausart_early_putchar;
 }