=================================================================== RCS file: /cvs/funnyos/arch/sam7s64/config.c,v retrieving revision 1.18 retrieving revision 1.19 diff -u -r1.18 -r1.19 --- funnyos/arch/sam7s64/config.c 2008/01/02 02:32:27 1.18 +++ funnyos/arch/sam7s64/config.c 2008/01/06 18:15:03 1.19 @@ -1,5 +1,5 @@ /* - * $Id: config.c,v 1.18 2008/01/02 02:32:27 nbrk Exp $ + * $Id: config.c,v 1.19 2008/01/06 18:15:03 nbrk Exp $ */ #include #include @@ -147,21 +147,21 @@ /* initialize USART0 (we clock it in PMC above) */ - *AT91C_PIOA_PDR = AT91C_PA5_RXD0 | /* Enable RxD0 Pin */ - AT91C_PA6_TXD0; /* Enalbe TxD0 Pin */ + *AT91C_PIOA_PDR = AT91C_PA21_RXD1 | /* Enable RxD0 Pin */ + AT91C_PA22_TXD1; /* Enalbe TxD0 Pin */ - *AT91C_US0_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */ + *AT91C_US1_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */ AT91C_US_CLKS_CLOCK | /* Clock = MCK */ AT91C_US_CHRL_8_BITS | /* 8-bit Data */ AT91C_US_PAR_NONE | /* No Parity */ AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */ - *AT91C_US0_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */ + *AT91C_US1_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */ /* enable DMA transfers on USART0 */ - *AT91C_US0_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN; + *AT91C_US1_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN; - *AT91C_US0_CR = AT91C_US_RXEN | /* Receiver Enable */ + *AT91C_US1_CR = AT91C_US_RXEN | /* Receiver Enable */ AT91C_US_TXEN; /* Transmitter Enable */ /* redefine putchar */