=================================================================== RCS file: /cvs/funnyos/arch/sam7s64/config.c,v retrieving revision 1.14 retrieving revision 1.20 diff -u -r1.14 -r1.20 --- funnyos/arch/sam7s64/config.c 2007/12/16 23:16:09 1.14 +++ funnyos/arch/sam7s64/config.c 2008/01/07 20:29:21 1.20 @@ -1,5 +1,5 @@ /* - * $Id: config.c,v 1.14 2007/12/16 23:16:09 nbrk Exp $ + * $Id: config.c,v 1.20 2008/01/07 20:29:21 nbrk Exp $ */ #include #include @@ -20,8 +20,13 @@ extern struct driver saaic_dr; extern struct driver sartt_dr; extern struct driver gpiobtn_dr; +extern struct driver saspi_dr; +extern struct driver spisdmmc_dr; +extern struct driver sdmmc_dr; +extern struct driver gpio7seg_dr; +extern struct driver p64lcd_dr; +extern struct driver h44780_dr; - extern void (*putchar)(char); extern void sausart_early_putchar(char ch); @@ -40,8 +45,14 @@ { "gpioled","sapio", 0, 18, -1, 0 }, { "gpiobtn","sapio", 0, 19, 0, 0 /*controls gpioled/0*/}, { "gpiobtn","sapio", 0, 20, 30, 0 /*controls gpioled/1*/}, + { "gpio7seg","sapio", 0, 0, -1, 0 }, + { "p64lcd", "sapio", 0, 0, -1, 0 }, + { "h44780", "p64lcd", 0, 0, -1, 0 }, // { "sartt", "saapbus", 0, 0, 1, 0 }, - { "saaic", "saapbus", 0, 0, -1, 0 }, + { "saspi", "saapbus", 0, 0, 0, 0 }, + { "spisdmmc","saspi", 0, 0, 0, 0 }, + { "sdmmc", "spisdmmc", 0, 0, 0, 0 }, +// { "saaic", "saapbus", 0, 0, -1, 0 }, { NULL, NULL, 0, 0, -1, 0 } }; @@ -58,7 +69,13 @@ { "gpioled", &gpioled_dr, -1 }, { "saaic", &saaic_dr, -1 }, { "sartt", &sartt_dr, -1 }, - { "gpiobtn", &gpiobtn_dr, -1 }, + { "gpiobtn", &gpiobtn_dr, -1 }, + { "saspi", &saspi_dr, -1 }, + { "spisdmmc", &spisdmmc_dr, -1 }, + { "sdmmc", &sdmmc_dr, -1 }, + { "gpio7seg", &gpio7seg_dr, -1 }, + { "p64lcd", &p64lcd_dr, -1 }, + { "h44780", &h44780_dr, -1 }, { NULL, NULL, 0 } }; @@ -136,25 +153,26 @@ /* initialize USART0 (we clock it in PMC above) */ - *AT91C_PIOA_PDR = AT91C_PA5_RXD0 | /* Enable RxD0 Pin */ - AT91C_PA6_TXD0; /* Enalbe TxD0 Pin */ + *AT91C_PIOA_PDR = AT91C_PA21_RXD1 | /* Enable RxD0 Pin */ + AT91C_PA22_TXD1; /* Enalbe TxD0 Pin */ - *AT91C_US0_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */ + *AT91C_US1_MR = AT91C_US_USMODE_NORMAL | /* Normal Mode */ AT91C_US_CLKS_CLOCK | /* Clock = MCK */ AT91C_US_CHRL_8_BITS | /* 8-bit Data */ AT91C_US_PAR_NONE | /* No Parity */ AT91C_US_NBSTOP_1_BIT; /* 1 Stop Bit */ - *AT91C_US0_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */ + *AT91C_US1_BRGR = 48054857 / 16 / 9600; /* Baud Rate Divisor */ /* enable DMA transfers on USART0 */ - *AT91C_US0_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN; + *AT91C_US1_PTCR = AT91C_PDC_TXTEN | AT91C_PDC_RXTEN; - *AT91C_US0_CR = AT91C_US_RXEN | /* Receiver Enable */ + *AT91C_US1_CR = AT91C_US_RXEN | /* Receiver Enable */ AT91C_US_TXEN; /* Transmitter Enable */ /* redefine putchar */ putchar = sausart_early_putchar; + }