/*
* $Id: loader.S,v 1.5 2007/11/12 15:49:18 nbrk Exp $
*/
/*
* FunnyOS loader
* for Atmel SAM7S64 SoC.
*/
.text
.global _start
.global main
_start:
b _vector_reset /* reset */
bl _vector_undef /* undefined insn */
bl _vector_swi /* software intr handler */
bl _vector_dataabrt /* data abort */
bl _vector_prefabrt /* prefetch abort */
.word 0x00000000 /* [reserved] */
b _vector_irq /* IRQ */
bl _vector_fiq /* Fast Interrupt Request */
_vector_reset:
/*
* Will enter here just right after RESET.
* Relocate .data & .bss into SRAM, set up stack and call main.
*/
/* load .data addr */
ldr r1, Asdata
/* load end of FLASH */
ldr r2, Aedata
/* load addr in sram */
ldr r3, Asram
/* copy data in sram */
loop:
ldr r4, [r1], #4 /* fetch from flash */
str r4, [r3], #4 /* store to sram */
cmp r1, r3 /* compare with end of flash */
bls loop
/*
* Setup an IRQ stack
*/
/* switch into irq mode with interrupts disabled */
msr cpsr_c, #(0x12 | 0x80)
/* set sp (sp is banked) */
ldr sp, Airqstack
/*
* Setup system stack
*/
/* switch into system mode (interrupts turned off) */
msr cpsr_c, #(0x1f | 0x80)
/* set system stack pointer */
ldr sp, Asysstack
b main
/* NOTREACHED */
_vector_undef:
/* Undefined insn handler */
mov pc, r14
_vector_swi:
mov pc, r14
_vector_dataabrt:
/* XXX fatal */
nop
_vector_prefabrt:
nop
_vector_irq:
/* decrement pc by one insn */
sub lr, lr, #4
/* store all system mode registers */
stmdb sp!, {r0-r12, lr}
bl irq_trampoline
/* load r0-r12 and pc from the stack */
/* note ^ that copies SPSR into CPSR */
ldmia sp!, {r0-r12, pc}^
_vector_fiq:
nop
Asdata:
.word 0x0000f000
Aedata:
.word 0x0000ffff
Asram:
.word 0x00200000
/* last word of the physical memory */
Asysstack:
.word 0x00203fff
Airqstack:
.word 0x00203c00