Return to loader.S CVS log

Up to [local] / funnyos / arch / sam7s64 / boot

Annotation of funnyos/arch/sam7s64/boot/loader.S, Revision 1.8

1.1       init        1: /*
1.8     ! nbrk        2:  * $Id: loader.S,v 1.7 2007/11/12 23:40:42 nbrk Exp $
1.1       init        3:  */
                      4: /*
                      5:  *     FunnyOS loader
                      6:  *     for Atmel SAM7S64 SoC.
                      7:  */
                      8: .text
                      9: .global _start
                     10: .global main
                     11:
                     12: _start:
                     13: b      _vector_reset           /* reset */
                     14: bl     _vector_undef           /* undefined insn */
                     15: bl     _vector_swi                     /* software intr handler */
                     16: bl     _vector_dataabrt        /* data abort */
                     17: bl     _vector_prefabrt        /* prefetch abort */
                     18: .word 0x00000000               /* [reserved] */
                     19: b      _vector_irq                     /* IRQ */
                     20: bl     _vector_fiq                     /* Fast Interrupt Request */
                     21:
                     22: _vector_reset:
                     23:        /*
                     24:         *      Will enter here just right after RESET.
1.5       nbrk       25:         *      Relocate .data & .bss into SRAM, set up stack and call main.
1.1       init       26:         */
                     27:
1.5       nbrk       28:        /* load .data addr */
1.6       nbrk       29:        ldr r1, Aflash_sdata
1.5       nbrk       30:
                     31:        /* load end of FLASH */
1.6       nbrk       32:        ldr r2, Aflash_edata
1.5       nbrk       33:
1.6       nbrk       34:        /* will copy data in sram starting from that addr */
                     35:        ldr r3, Asram_sdata
1.5       nbrk       36:
1.6       nbrk       37:        /*
                     38:         * Copy data in sram
                     39:         */
1.5       nbrk       40: loop:
1.6       nbrk       41:        ldr r4, [r1], #4        /* fetch from flash, increment flash_sdata */
                     42:        str r4, [r3], #4        /* store to sram, increment sram_sdata */
                     43:        cmp r1, r2                      /* compare with flash_edata */
                     44:        blo loop
1.5       nbrk       45:
1.1       init       46:        /*
                     47:         * Setup an IRQ stack
                     48:         */
                     49:        /* switch into irq mode with interrupts disabled */
                     50:        msr cpsr_c, #(0x12 | 0x80)
                     51:
                     52:        /* set sp (sp is banked) */
                     53:        ldr sp, Airqstack
                     54:
                     55:        /*
                     56:         * Setup system stack
                     57:         */
                     58:        /* switch into system mode (interrupts turned off) */
                     59:        msr cpsr_c, #(0x1f | 0x80)
                     60:
                     61:        /* set system stack pointer */
                     62:        ldr sp, Asysstack
                     63:
1.7       nbrk       64:        bl main
1.1       init       65:        /* NOTREACHED */
                     66:
                     67: _vector_undef:
                     68:        /* Undefined insn handler */
                     69:        mov pc, r14
                     70:
                     71: _vector_swi:
                     72:        mov pc, r14
                     73:
                     74: _vector_dataabrt:
                     75:        /* XXX fatal */
                     76:        nop
                     77:
                     78: _vector_prefabrt:
                     79:        nop
                     80:
                     81: _vector_irq:
                     82:        /* decrement pc by one insn */
                     83:        sub lr, lr, #4
                     84:
                     85:        /* store all system mode registers */
                     86:        stmdb sp!, {r0-r12, lr}
                     87:
                     88:        bl irq_trampoline
                     89:
                     90:        /* load r0-r12 and pc from the stack */
                     91:        /* note ^ that copies SPSR into CPSR */
                     92:        ldmia sp!, {r0-r12, pc}^
                     93:
                     94: _vector_fiq:
                     95:        nop
                     96:
1.6       nbrk       97: Aflash_sdata:
1.5       nbrk       98: .word  0x0000f000
                     99:
1.6       nbrk      100: Aflash_edata:
1.8     ! nbrk      101: .word  0x0000fffc
1.5       nbrk      102:
1.6       nbrk      103: Asram_sdata:
1.5       nbrk      104: .word  0x00200000
                    105:
1.1       init      106: /* last word of the physical memory */
                    107: Asysstack:
1.7       nbrk      108: .word  0x00203ffc
1.5       nbrk      109:
1.1       init      110: Airqstack:
1.4       init      111: .word  0x00203c00
1.1       init      112: