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Annotation of funnyos/arch/sam7s64/boot/loader.S, Revision 1.5

1.1       init        1: /*
1.5     ! nbrk        2:  * $Id: loader.S,v 1.4 2007/11/09 15:09:57 init Exp $
1.1       init        3:  */
                      4: /*
                      5:  *     FunnyOS loader
                      6:  *     for Atmel SAM7S64 SoC.
                      7:  */
                      8: .text
                      9: .global _start
                     10: .global main
                     11:
                     12: _start:
                     13: b      _vector_reset           /* reset */
                     14: bl     _vector_undef           /* undefined insn */
                     15: bl     _vector_swi                     /* software intr handler */
                     16: bl     _vector_dataabrt        /* data abort */
                     17: bl     _vector_prefabrt        /* prefetch abort */
                     18: .word 0x00000000               /* [reserved] */
                     19: b      _vector_irq                     /* IRQ */
                     20: bl     _vector_fiq                     /* Fast Interrupt Request */
                     21:
                     22: _vector_reset:
                     23:        /*
                     24:         *      Will enter here just right after RESET.
1.5     ! nbrk       25:         *      Relocate .data & .bss into SRAM, set up stack and call main.
1.1       init       26:         */
                     27:
1.5     ! nbrk       28:        /* load .data addr */
        !            29:        ldr r1, Asdata
        !            30:
        !            31:        /* load end of FLASH */
        !            32:        ldr r2, Aedata
        !            33:
        !            34:        /* load addr in sram */
        !            35:        ldr r3, Asram
        !            36:
        !            37:        /* copy data in sram */
        !            38: loop:
        !            39:        ldr r4, [r1], #4        /* fetch from flash */
        !            40:        str r4, [r3], #4        /* store to sram */
        !            41:        cmp r1, r3                      /* compare with end of flash */
        !            42:        bls loop
        !            43:
1.1       init       44:        /*
                     45:         * Setup an IRQ stack
                     46:         */
                     47:        /* switch into irq mode with interrupts disabled */
                     48:        msr cpsr_c, #(0x12 | 0x80)
                     49:
                     50:        /* set sp (sp is banked) */
                     51:        ldr sp, Airqstack
                     52:
                     53:        /*
                     54:         * Setup system stack
                     55:         */
                     56:        /* switch into system mode (interrupts turned off) */
                     57:        msr cpsr_c, #(0x1f | 0x80)
                     58:
                     59:        /* set system stack pointer */
                     60:        ldr sp, Asysstack
                     61:
                     62:        b main
                     63:        /* NOTREACHED */
                     64:
                     65: _vector_undef:
                     66:        /* Undefined insn handler */
                     67:        mov pc, r14
                     68:
                     69: _vector_swi:
                     70:        mov pc, r14
                     71:
                     72: _vector_dataabrt:
                     73:        /* XXX fatal */
                     74:        nop
                     75:
                     76: _vector_prefabrt:
                     77:        nop
                     78:
                     79: _vector_irq:
                     80:        /* decrement pc by one insn */
                     81:        sub lr, lr, #4
                     82:
                     83:        /* store all system mode registers */
                     84:        stmdb sp!, {r0-r12, lr}
                     85:
                     86:        bl irq_trampoline
                     87:
                     88:        /* load r0-r12 and pc from the stack */
                     89:        /* note ^ that copies SPSR into CPSR */
                     90:        ldmia sp!, {r0-r12, pc}^
                     91:
                     92: _vector_fiq:
                     93:        nop
                     94:
1.5     ! nbrk       95: Asdata:
        !            96: .word  0x0000f000
        !            97:
        !            98: Aedata:
        !            99: .word  0x0000ffff
        !           100:
        !           101: Asram:
        !           102: .word  0x00200000
        !           103:
1.1       init      104: /* last word of the physical memory */
                    105: Asysstack:
1.2       init      106: .word  0x00203fff
1.5     ! nbrk      107:
1.1       init      108: Airqstack:
1.4       init      109: .word  0x00203c00
1.1       init      110: